#if 0
/*
 * max14830.c
 *
 */

#include "cmsis_os.h"
#include "max14830.h"
#include "main.h"
#include "semphr.h"

#define SPI_TO_UART_ENB

#define TRUE 1
#define FALSE 0
#define CS_Pin GPIO_PIN_11
#define CS_Port GPIOA

extern osTimerId_t port0_tmr_handle;
extern osTimerId_t port1_tmr_handle;
extern osTimerId_t port2_tmr_handle;
extern osTimerId_t port3_tmr_handle;

extern osMessageQueueId_t  max14820_rcv_queue_hdl;

extern osSemaphoreId_t intr_semhandle;
extern osSemaphoreId_t recieve_semhandle;
extern osSemaphoreId_t transmit_semhandle;
extern osSemaphoreId_t callback_semhandle;

extern osSemaphoreId_t csn_semhandle;

extern SPI_HandleTypeDef hspi2;
s_max14830_hdle spi_uart_max1430;
s_test_spi_uart_conv spi_uart_conv;

uint8_t rcv1[100];

uint8_t isr;
volatile uint8_t flag=0;

extern void* gpio_j;
extern void* gpio_a;

s_max14830_hdle *inst_hdl;

max14830_sem_take_fptr_t sem_take;
max14830_timer_fptr_t timer;
max14830_os_delay_fptr_t delay_ms;
max14830_sem_give_fptr_t sem_give;
max14830_timer_start_fptr_t timer_start;
max14830_timer_stop_fptr_t timer_stop;
max14830_malloc_fptr_t malloc_func;
max14830_queue_send_fptr_t queue_send;

/**
 * @brief This function write data to the specified register in the MAX14830
 * @param[in] max14830_hdl : structure handle of max14830
 * @param[in] port : indicates the UART port
 * @param[in] reg_addr : register address
 * @param[in] len : length of the data
 * @param[in] val : Value to be write
 * @retval e_max14830_ret_sts - returns the success or error code
 */
static e_max14830_ret_sts max14830_write(s_max14830_hdle *max14830_hdl,uint8_t port, uint8_t reg_addr,uint16_t len,uint8_t *val);

/**
 * @brief This function read one byte from the specified register in the MAX14830
 * @param[in] max14830_hdl : structure handle of max14830
 * @param[in] port : indicates the UART port
 * @param[in] reg_addr : register address
 * @param[in] len : length of the data
 * @param[out] buff : Value to be read
 * @retval Returens the read value
 */
//static e_max14830_ret_sts max14830_read(s_max14830_hdle *max14830_hdl,uint8_t port, uint8_t reg_addr,uint16_t len,uint8_t *buff);

#if 0
/**
 * @brief This function write burst of byte to the specified register in the MAX14830
 * @param[in] port : indicates the UART port
 * @param[in] reg : register address
 * @param[in] len : length of the data to be set
 * @param[in] ptr : pointer to the buffer
 * @retval e_max14830_ret_sts - returns the success or error code
 */
static e_max14830_ret_sts max14830_spi_puts(s_max14830_hdle *max14830_hdl,uint8_t port, uint8_t reg_addr,uint8_t len,uint8_t *ptr);

/**
 * @brief This function read burst of byte from the specified register in the MAX14830
 * @param[in] port : indicates the UART port
 * @param[in] len : length of the data to be set
 * @param[out] ptr : pointer to the buffer
 * @retval e_max14830_ret_sts - returns the success or error code
 */
static e_max14830_ret_sts max14830_spi_gets(s_max14830_hdle *max14830_hdl,unsigned int port,unsigned int len,unsigned char *ptr,uint8_t reg);
#endif
/**
 * @brief This function transmit the data through SPI interface
 * @param[in] max14830_hdl : Instance handle
 * @param[in] buffer : pointer to the buffer
 * @param[in] length : length of the buffer
 * @param[in] timeout : timeout duration
 * @retval e_max14830_ret_sts - returns the success or error code
 */
static e_max14830_ret_sts transmit_wrapper(s_max14830_hdle *max14830_hdl, uint8_t *buffer, uint16_t length, uint32_t timeout);

/**
 * @brief This function receive the data through SPI interface
 * @param[in] max14830_hdl : Instance handle
 * @param[out] buffer : pointer to the buffer
 * @param[in] length : length of the buffer
 * @param[in] timeout : timeout
 * @retval e_max14830_ret_sts - returns the success or error code
 */
static e_max14830_ret_sts receive_wrapper(s_max14830_hdle *max14830_hdl, uint8_t *buffer, uint16_t length, uint32_t timeout);

s_port_reg_cfg_value cfg_val;

void max14830_readbck_reg(s_max14830_hdle *max14830_hdl);
/*
 * @brief Initialize the max14830 and configure the needed hardware resources
 */
uint8_t max14830_init(s_max14830_hdle *max14830_hdl)
{
    e_max14830_ret_sts sts = M;
    uint8_t IRQ_Pin_sts;
    uint8_t count = 0;
    uint8_t clk = MAX14830_CLK_CFG;
    uint8_t pll = MAX14830_PLL_CFG;
    if(max14830_hdl == NULL)
    {
        sts = MAX14830_NULL_PTR;
    }
    else
    {
#ifdef SPI_TO_UART_ENB
#if 1
        HAL_GPIO_WritePin(GPIOJ, GPIO_PIN_3, MAX14830_GPIO_RESET);
        //max14830_hdl->gpio_write(max14830_hdl->rst_pin, MAX14830_GPIO_RESET);
        HAL_Delay(1);
        HAL_GPIO_WritePin(GPIOJ, GPIO_PIN_3, MAX14830_GPIO_SET);
        //max14830_hdl->gpio_write(max14830_hdl->rst_pin, MAX14830_GPIO_SET);

        IRQ_Pin_sts = HAL_GPIO_ReadPin(GPIOJ, GPIO_PIN_4);
        //while(max14830_hdl->gpio_read(max14830_hdl->irq_pin) == MAX14830_GPIO_RESET)
        while(IRQ_Pin_sts == MAX14830_GPIO_RESET && count <= MAX14830_RETRY_COUNT)
        {
            HAL_Delay(10);
            count++;
        }
#endif

#endif

#if 0
        uint8_t offset = MAX14830_TIMEOUT_OFFSET;
        uint32_t timer_count = timer() + offset;
        while(timer_count > timer())
        {
            if(max14830_hdl->gpio_read(gpio_j, IRQ_Pin) == MAX14830_GPIO_RESET) ////POLL_MAX14830_IRQ == 0;
            {
                sts = MAX14830_SCS;
                break;
            }
            else
                sts = MAX14830_ERR;
        }

        if(sts == MAX14830_SCS)
#endif
            //{
            if(max14830_write(max14830_hdl,MAX14830_CH0,MAX14830_CLKSRC_REG,1,&clk)==MAX14830_SCS)//crystal enb , disable pll bypass and pll enable
            {

                max14830_readbck_reg(max14830_hdl);
                if(max14830_write(max14830_hdl,MAX14830_CH0,MAX14830_PLLCFG_REG,1,&pll)==MAX14830_SCS)          //0x44
                {
                    sts = MAX14830_SCS;
                }
                else
                {
                    sts = MAX14830_COM_ERR;
                }
            }
            else
            {
                sts = MAX14830_COM_ERR;
            }
        /*}
    else
    {
        sts = MAX14830_ERR;
    }*/
        //}
    }
    return sts;
}
void max14830_readbck_reg(s_max14830_hdle *max14830_hdl)
{
    uint8_t val,val1,val2,val3,val4,val5,val6,val7,val8,val9,val10;
    max14830_read(max14830_hdl,MAX14830_CH0,MAX14830_CLKSRC_REG,1,&val);
    max14830_read(max14830_hdl,MAX14830_CH0,MAX14830_PLLCFG_REG,1,&val1);
    max14830_read(max14830_hdl,MAX14830_CH2,MAX14830_RXTO_REG,1,&val2);
    max14830_read(max14830_hdl,MAX14830_CH2,MAX14830_LSR_IRQEN_REG,1,&val3);
    max14830_read(max14830_hdl,MAX14830_CH2,MAX14830_MODE1_REG,1,&val4);
    max14830_read(max14830_hdl,MAX14830_CH2,MAX14830_IRQEN_REG,1,&val5);
    max14830_read(max14830_hdl,MAX14830_CH2,MAX14830_FIFOTRIGLVL_REG,1,&val6);
    max14830_read(max14830_hdl,MAX14830_CH2,MAX14830_LCR_REG,1,&val7);
    max14830_read(max14830_hdl,MAX14830_CH2, MAX14830_BRGCFG_REG,  1, &val8); //disable MAX14830_BRGCFG_CLKDIS_BIT
    max14830_read(max14830_hdl,MAX14830_CH2, MAX14830_BRGDIVMSB_REG,1, &val9);
    max14830_read(max14830_hdl,MAX14830_CH2, MAX14830_BRGDIVLSB_REG,1, &val10);
    //    max14830_read(max14830_hdl,MAX14830_CH0,MAX14830_LCR_REG,1,&val8);
}

/*
 * @brief This API initialize the UART configurations
 */
e_max14830_ret_sts max14830_uart_init(s_max14830_hdle *max14830_hdl,s_max14830_uart_init_cfg *init_data)
{
    e_max14830_ret_sts sts=MAX14830_ERR;
    uint8_t timeout = MAX14830_TIMEOUT_CFG;
    uint8_t irq_reg = MAX14830_IRQ_LSR_BIT|MAX14830_IRQ_RXFIFO_BIT;
    uint8_t fifo_trg_lvl = MAX14830_FIFO_TRIG_LVL_CFG;
    uint8_t lsr_irq_en = MAX14830_LSR_IRQ_EN_CFG;
    uint8_t mode1_reg = MAX14830_MODE1_REG_CFG;

    max14830_set_baudrate(max14830_hdl,init_data->chnl_id, init_data->baudrate);
    if(max14830_write(max14830_hdl,init_data->chnl_id,MAX14830_RXTO_REG,1,&timeout)==MAX14830_SCS)  //timeout    //MAX14830_LSR_IRQEN_REG
    {
        if(max14830_write(max14830_hdl,init_data->chnl_id,MAX14830_LSR_IRQEN_REG, 1,&lsr_irq_en)==MAX14830_SCS)  //Enable timeout
        {
            if(max14830_write(max14830_hdl,init_data->chnl_id,MAX14830_MODE1_REG, 1,&mode1_reg)==MAX14830_SCS)  //Enable timeout
            {
                if(max14830_write(max14830_hdl,init_data->chnl_id,MAX14830_IRQEN_REG, 1,&irq_reg)==MAX14830_SCS)  //MAX14830_IRQ_RXFIFO_BIT    //|MAX14830_IRQ_LSR_BIT
                {
                    if(max14830_write(max14830_hdl,init_data->chnl_id,MAX14830_FIFOTRIGLVL_REG,1,&fifo_trg_lvl)==MAX14830_SCS) //8byte
                    {
                        if(max14830_set_stopbit(max14830_hdl,init_data->chnl_id,MAX14830_LCR_REG,init_data->stop_bit)==MAX14830_SCS)
                        {
                            if(max14830_set_wrdlen(max14830_hdl,init_data->chnl_id,MAX14830_LCR_REG, init_data->wrd_len)==MAX14830_SCS)
                            {
                                //if(max14830_write(max14830_hdl,init_data->chnl_id,MAX14830_LSR_IRQEN_REG, 1,&lsr_irq_en)==MAX14830_SCS)  //Enable timeout
                                //{
                                //if(max14830_write(max14830_hdl,init_data->chnl_id,MAX14830_MODE1_REG, 1,&mode1_reg)==MAX14830_SCS)  //Enable timeout
                                //{
                                sts = MAX14830_SCS;
                            }
                            else
                            {
                                sts = MAX14830_COM_ERR;
                            }
                        }
                        else
                        {
                            sts = MAX14830_COM_ERR;
                        }
                    }
                    else
                    {
                        sts = MAX14830_COM_ERR;
                    }
                }
                else
                {
                    sts = MAX14830_COM_ERR;
                }
            }
            else
            {
                sts = MAX14830_COM_ERR;
            }
        }
    }
    max14830_readbck_reg(max14830_hdl);
    return sts;
}

/*
 * @brief This API transmit the data
 */
void max14830_uart_tx(s_max14830_hdle *hdle,uint8_t port, uint8_t *tx_buff, uint16_t tx_len)
{
    //  max14830_readbck_reg(hdle);

    uint8_t tx_fifo_lvl;
    while(tx_len>0)
    {
        max14830_read(hdle,port,MAX14830_TXFIFOLVL_REG,1,&tx_fifo_lvl); // It just check the current no of words in txfifo
        while(tx_fifo_lvl >= (128 - MAX_TX_LEN))        //128-32 is 96 because the txfifo level is 32 , so the ascii vslue of 'A' is 65 so 65+32 is 96
        {
            max14830_read(hdle,port,MAX14830_TXFIFOLVL_REG,1,&tx_fifo_lvl);
            HAL_Delay(10);

        }

        if(tx_len<=MAX_TX_LEN)
        {
            max14830_write(hdle,port,MAX14830_THR_REG,tx_len,tx_buff);
            tx_len=0;
        }
        else
        {
            max14830_write(hdle,port,MAX14830_THR_REG,MAX_TX_LEN,tx_buff);
            tx_len=tx_len-MAX_TX_LEN;
            tx_buff=tx_buff+MAX_TX_LEN;
        }
    }
}

e_max14830_ret_sts max14830_set_uart_rx_state(s_max14830_hdle *hdle, uint8_t port, uint8_t rx_state)
{
    e_max14830_ret_sts sts;
    uint8_t data;
    if(hdle == NULL)
    {
        sts = MAX14830_NULL_PTR;
    }
    {
        sts = max14830_read(inst_hdl,port,MAX14830_MODE1_REG,1,(uint8_t*)&data);
        if(rx_state ==1)
        {
            data = data & 0xFE;
        }
        else
        {
            data = data | 0x01;
        }
        sts = max14830_write(inst_hdl,port,MAX14830_MODE1_REG,1,&data);

    }
    return sts;
}

/*
 * @brief This API to receive the data
 */
e_max14830_ret_sts max14830_uart_rx_intr(s_max14830_hdle *hdle,uint8_t port,uint16_t len,max14830_callback_fptr_t callback_func)
{
    e_max14830_ret_sts sts;
    if(hdle == NULL)
    {
        sts = MAX14830_NULL_PTR;
    }
    else
    {
        switch(port)
        {
        case MAX14830_CH0:
            inst_hdl = hdle;
            inst_hdl->callback0_func = callback_func;
            break;
        case MAX14830_CH1:
            inst_hdl = hdle;
            inst_hdl->callback1_func = callback_func;
            break;
        case MAX14830_CH2:
            inst_hdl = hdle;
            inst_hdl->callback2_func = callback_func;
            break;
        case MAX14830_CH3:
            inst_hdl = hdle;
            inst_hdl->callback3_func = callback_func;
            break;
        default:
            break;
        }
        sts = max14830_set_uart_rx_state(hdle,port,1);
    }
    return sts;
}

volatile uint8_t ch3_isr_sts,ch3_lsr_sts;
volatile uint16_t ch3_rx_len=1;
volatile uint8_t* ch3_bufr;
volatile int ch3_flg=1;
uint32_t ch3_max14830_queue_pld = MAX14830_CH3;
/*
 * @brief This API receive the data from channel 3 with interrupt mode
 */
void max14830_rx_ch3_it()
{
    if(ch3_flg==1)
    {
        timer_start(port3_tmr_handle,MAX1680_SW_TMOUT);
        ch3_bufr=inst_hdl->rcv3_ptr;
        ch3_flg=0;
    }
    max14830_read(inst_hdl,MAX14830_CH3,MAX14830_IRQSTS_REG,1,(uint8_t*)&ch3_isr_sts);
    max14830_read(inst_hdl,MAX14830_CH3,MAX14830_LSR_IRQSTS_REG,1,(uint8_t*)&ch3_lsr_sts);
    max14830_read(inst_hdl,MAX14830_CH3,MAX14830_RXFIFOLVL_REG,1,(uint8_t*)&ch3_rx_len);
    if(ch3_rx_len)
    {
        max14830_read(inst_hdl,MAX14830_CH3,MAX14830_RHR_REG,ch3_rx_len,(uint8_t*)ch3_bufr);
        ch3_bufr=ch3_bufr+ch3_rx_len;
    }
    if((ch3_lsr_sts&0x01)==1)
    {
        max14830_set_uart_rx_state(inst_hdl,MAX14830_CH3,0);
        ch3_flg=1;
        ch3_bufr=NULL;
        timer_stop(port3_tmr_handle);
        osMessageQueuePut(max14820_rcv_queue_hdl,&ch3_max14830_queue_pld,0,osWaitForever);
    }
}

volatile uint8_t ch2_isr_sts,ch2_lsr_sts;
volatile uint16_t ch2_rx_len=1;
volatile uint8_t* ch2_bufr;
volatile int ch2_flg=1;
uint32_t ch2_max14830_queue_pld = MAX14830_CH2;
/*
 * @brief This API receive the data from channel 2 with interrupt mode
 */
void max14830_rx_ch2_it()
{

    if(ch2_flg==1)
    {
        timer_start(port2_tmr_handle,MAX1680_SW_TMOUT);
        ch2_bufr=inst_hdl->rcv2_ptr;
        ch2_flg=0;
    }
    max14830_read(inst_hdl,MAX14830_CH2,MAX14830_IRQSTS_REG,1,(uint8_t*)&ch2_isr_sts);
    max14830_read(inst_hdl,MAX14830_CH2,MAX14830_LSR_IRQSTS_REG,1,(uint8_t*)&ch2_lsr_sts);
    max14830_read(inst_hdl,MAX14830_CH2,MAX14830_RXFIFOLVL_REG,1,(uint8_t*)&ch2_rx_len);

    if(ch2_rx_len)
    {
        max14830_read(inst_hdl,MAX14830_CH2,MAX14830_RHR_REG,ch2_rx_len,(uint8_t*)ch2_bufr);
        ch2_bufr=ch2_bufr+ch2_rx_len;
    }
    if((ch2_lsr_sts & 0x01)==1)
    {
        max14830_set_uart_rx_state(inst_hdl,MAX14830_CH2,0);
        ch2_flg=1;
        ch2_bufr=NULL;
        timer_stop(port2_tmr_handle);
        osMessageQueuePut(max14820_rcv_queue_hdl,&ch2_max14830_queue_pld,0,osWaitForever);
    }
}

volatile uint8_t ch1_isr_sts,ch1_lsr_sts;
volatile uint16_t ch1_rx_len=1;
volatile uint8_t* ch1_bufr;
volatile int ch1_flg=1;
uint32_t ch1_max14830_queue_pld = MAX14830_CH1;
/*
 * @brief This API receive the data from channel 1 with interrupt mode
 */
void max14830_rx_ch1_it()
{

    if(ch1_flg==1)
    {
        timer_start(port1_tmr_handle,MAX1680_SW_TMOUT);
        ch1_bufr=inst_hdl->rcv1_ptr;
        ch1_flg=0;
    }
    max14830_read(inst_hdl,MAX14830_CH1,MAX14830_IRQSTS_REG,1,(uint8_t*)&ch1_isr_sts);
    max14830_read(inst_hdl,MAX14830_CH1,MAX14830_LSR_IRQSTS_REG,1,(uint8_t*)&ch1_lsr_sts);
    max14830_read(inst_hdl,MAX14830_CH1,MAX14830_RXFIFOLVL_REG,1,(uint8_t*)&ch1_rx_len);
    if(ch1_rx_len)
    {
        max14830_read(inst_hdl,MAX14830_CH1,MAX14830_RHR_REG,ch1_rx_len,(uint8_t*)ch1_bufr);

        ch1_bufr=ch1_bufr+ch1_rx_len;
    }
    if((ch1_lsr_sts&0x01)==1)
    {
        max14830_set_uart_rx_state(inst_hdl,MAX14830_CH1,0);
        ch1_flg=1;
        ch1_bufr=NULL;
        timer_stop(port1_tmr_handle);
        osMessageQueuePut(max14820_rcv_queue_hdl,&ch1_max14830_queue_pld,0,osWaitForever);
    }
}

volatile uint8_t ch0_isr_sts,ch0_lsr_sts;
volatile uint16_t ch0_rx_len=1;
volatile uint8_t* ch0_bufr;
volatile int ch0_flg=1;
uint32_t ch0_max14830_queue_pld = MAX14830_CH0;
/*
 * @brief This API receive the data from channel 0 with interrupt mode
 */
void max14830_rx_ch0_it()
{

    if(ch0_flg==1)
    {
        timer_start(port0_tmr_handle,MAX1680_SW_TMOUT);
        ch0_bufr=inst_hdl->rcv0_ptr;
        ch0_flg=0;
    }
    max14830_read(inst_hdl,MAX14830_CH0,MAX14830_IRQSTS_REG,1,(uint8_t*)&ch0_isr_sts);
    max14830_read(inst_hdl,MAX14830_CH0,MAX14830_LSR_IRQSTS_REG,1,(uint8_t*)&ch0_lsr_sts);
    max14830_read(inst_hdl,MAX14830_CH0,MAX14830_RXFIFOLVL_REG,1,(uint8_t*)&ch0_rx_len);
    if(ch0_rx_len)
    {
        max14830_read(inst_hdl,MAX14830_CH0,MAX14830_RHR_REG,ch0_rx_len,(uint8_t*)ch0_bufr);
        ch0_bufr=ch0_bufr+ch0_rx_len;
    }
    if((ch0_lsr_sts&0x01)==1)
    {
        max14830_set_uart_rx_state(inst_hdl,MAX14830_CH0,0);
        ch0_flg=1;
        ch0_bufr=NULL;
        timer_stop(port0_tmr_handle);
        osMessageQueuePut(max14820_rcv_queue_hdl,&ch0_max14830_queue_pld,0,osWaitForever);
    }
}

#if 0
/*
 * @brief This API set the receive timeout
 */
e_max14830_ret_sts max14830_set_rx_tmout(e_max14830_intf_id intf_id,uint8_t port,uint8_t reg_id,uint16_t val)
{
    e_max14830_ret_sts sts;
    if(MAX14830_Write(intf_id,port,reg_id,val)==MAX14830_SCS)
    {
        sts = MAX14830_SCS;
    }
    else
    {
        sts = MAX14830_ERR;
    }
    return sts;
}


/*
 * @brief This API set the receive FIFO trigger level
 */
e_max14830_ret_sts max14830_set_rx_fifo_trg_lvl(uint8_t port,uint8_t reg_id,uint16_t val)
{
    e_max14830_ret_sts sts;
    if(MAX14830_Write(port,reg_id,val)==MAX14830_SCS)
    {
        sts = MAX14830_SCS;
    }
    else
    {
        sts = MAX14830_ERR;
    }
    return sts;
}
#endif

/*
 * @brief This API set the number of stopbit required
 */
e_max14830_ret_sts max14830_set_stopbit(s_max14830_hdle *max14830_hdl,uint8_t port,uint8_t reg_id,uint8_t val)
{
    e_max14830_ret_sts sts;
    uint8_t read_val;
    max14830_read(max14830_hdl,port,reg_id,1,&read_val);

    val = read_val & 0xFB;

    if(max14830_write(max14830_hdl,port,reg_id,1,&val)==MAX14830_SCS)
    {
        sts = MAX14830_SCS;
    }
    else
    {
        sts = MAX14830_ERR;
    }
    return sts;
}

/*
 * @brief This API set the word length
 */
e_max14830_ret_sts max14830_set_wrdlen(s_max14830_hdle *max14830_hdl,uint8_t port,uint8_t reg_id,uint8_t val)
{
    e_max14830_ret_sts sts;
    uint8_t read_val;
    max14830_read(max14830_hdl,port,reg_id,1,&read_val);
    val = read_val | 0x03;
    if(max14830_write(max14830_hdl,port,reg_id,1,&val)==MAX14830_SCS)
    {
        sts = MAX14830_SCS;
    }
    else
    {
        sts = MAX14830_ERR;
    }
    return sts;
}

#if 0
/*
 * @brief This API set the requirement of parity bit
 */
e_max14830_ret_sts max14830_set_paritybit(uint8_t port,uint8_t reg_id,uint16_t val)
{
    e_max14830_ret_sts sts;
    if(MAX14830_Write(port,reg_id,val)==MAX14830_SCS)
    {
        sts = MAX14830_SCS;
    }
    else
    {
        sts = MAX14830_ERR;
    }
    return sts;
}
#endif
/*
 * @brief This API set the baudrate
 */
uint16_t max14830_set_baudrate(s_max14830_hdle *max14830_hdl,uint8_t port, uint32_t baud_rate)
{
    unsigned int mode = 0, div = 0, frac = 0, c = 0, F = 0;
    uint8_t brgcfg_clkdis= MAX14830_BRGCFG_CLKDIS_BIT;
    uint8_t msb ;
    uint8_t lsb;
    uint8_t val8,val9,val10;
    uint8_t brgcfg;
    /*
     * Calculate the integer divisor first. Select a proper mode
     * in case if the requested baud is too high for the pre-defined
     * clocks frequency.
     */

    div = MAX14830_REF_FREQ / baud_rate;

    if (div < 8) {
        /* Mode x4 */
        c = 4;
        mode = MAX14830_BRGCFG_4XMODE_BIT;
    } else if (div < 16) {
        /* Mode x2 */
        c = 8;
        mode = MAX14830_BRGCFG_2XMODE_BIT;
    } else {
        c = 16;
    }

    /* Calculate the divisor in accordance with the fraction coefficient */
    div /= c;
    F = c*baud_rate;

    /* Calculate the baud rate fraction */
    if (div > 0)
        frac = (16*(MAX14830_REF_FREQ % F)) / F;
    else
        div = 1;

    msb = div >> 8;
    lsb = div;
    brgcfg = frac | mode;
    max14830_write(max14830_hdl,port, MAX14830_BRGCFG_REG,  1, &brgcfg_clkdis); //disable MAX14830_BRGCFG_CLKDIS_BIT
    max14830_write(max14830_hdl,port, MAX14830_BRGDIVMSB_REG,1, &msb);
    max14830_write(max14830_hdl,port, MAX14830_BRGDIVLSB_REG,1, &lsb);
    max14830_write(max14830_hdl,port, MAX14830_BRGCFG_REG, 1,&brgcfg);

    max14830_read(max14830_hdl,port, MAX14830_BRGCFG_REG,  1, &val8); //disable MAX14830_BRGCFG_CLKDIS_BIT
    max14830_read(max14830_hdl,port, MAX14830_BRGDIVMSB_REG,1, &val9);
    max14830_read(max14830_hdl,port, MAX14830_BRGDIVLSB_REG,1, &val10);
    return (16*MAX14830_REF_FREQ) / (c*(16*div + frac));
}

/*
 * @brief This API write data to the specified register in the MAX14830
 */
static e_max14830_ret_sts max14830_write(s_max14830_hdle *max14830_hdl,uint8_t port, uint8_t reg_addr,uint16_t len,uint8_t *val)
{
    e_max14830_ret_sts sts = MAX14830_COM_ERR;
    uint16_t cmd_byte;
    //sem_take(csn_semhandle,MAX14830_WAIT_FOREVER);
#ifdef SPI_TO_UART_ENB
    HAL_GPIO_WritePin((GPIO_TypeDef*)max14830_hdl->cs_port, max14830_hdl->cs_pin, MAX14830_GPIO_RESET);
#endif
    cmd_byte = (MAX14830_WRITE_BIT | (port & 0x60) | (reg_addr & 0x1F));//<<8;
    if(transmit_wrapper(max14830_hdl,(uint8_t *)&cmd_byte, 1, 100)==MAX14830_SCS)
    {
        if(transmit_wrapper(max14830_hdl, (uint8_t *)val, len, 100)==MAX14830_SCS)
        {
            sts = MAX14830_SCS;
        }
        else
        {
            sts = MAX14830_COM_ERR;
        }
    }
    else
    {
        sts = MAX14830_COM_ERR;
    }
#ifdef SPI_TO_UART_ENB
    HAL_GPIO_WritePin((GPIO_TypeDef*)max14830_hdl->cs_port, max14830_hdl->cs_pin, MAX14830_GPIO_SET);
#endif
    //sem_give(csn_semhandle);
    return sts;
}

/*
 * @brief This API read one byte from the specified register in the MAX14830
 */
e_max14830_ret_sts max14830_read(s_max14830_hdle *max14830_hdl,uint8_t port, uint8_t reg_addr,uint16_t len,uint8_t *buff)
{
    e_max14830_ret_sts sts = MAX14830_COM_ERR;
    uint8_t cmd_byte=0;
    // sem_take(csn_semhandle,MAX14830_WAIT_FOREVER);
#ifdef SPI_TO_UART_ENB
    HAL_GPIO_WritePin((GPIO_TypeDef*)max14830_hdl->cs_port, max14830_hdl->cs_pin, MAX14830_GPIO_RESET);
#endif
    cmd_byte = (port & 0x60) | (reg_addr & 0x1F);
    //port &= 0x7f;
    if(transmit_wrapper(max14830_hdl,(uint8_t *)&cmd_byte, 1, 100)==MAX14830_SCS)
    {
        if(receive_wrapper(max14830_hdl,(uint8_t *)buff,len,100)==MAX14830_SCS)
        {
            sts = MAX14830_SCS;
        }
        else
        {
            sts = MAX14830_COM_ERR;
        }
    }
    else
    {
        sts = MAX14830_COM_ERR;
    }
#ifdef SPI_TO_UART_ENB
    HAL_GPIO_WritePin((GPIO_TypeDef*)max14830_hdl->cs_port, max14830_hdl->cs_pin, MAX14830_GPIO_SET);
#endif
    //sem_give(csn_semhandle);
    return sts;
}

#if 0
/*
 * @brief This API write a burst of bytes to the MAX14830
 */
static e_max14830_ret_sts max14830_spi_puts(s_max14830_hdle *max14830_hdl,uint8_t port, uint8_t reg_addr,uint8_t len,uint8_t *ptr)
{
    e_max14830_ret_sts sts;
    uint16_t cmd_byte;
    max14830_hdl->gpio_write(gpio_a, MAX14830_GPIO_PIN_11, MAX14830_GPIO_RESET);
    cmd_byte = (MAX14830_WRITE_BIT | (port & 0x60) | (reg_addr & 0x1F));//<<8;
    if(transmit_wrapper(max14830_hdl,(uint8_t *)&cmd_byte, 1, 100)==MAX14830_SCS)
    {
        if(transmit_wrapper(max14830_hdl, (uint8_t *)ptr, len, 100)==MAX14830_SCS)
        {
            sts = MAX14830_SCS;
        }
        else
        {
            sts = MAX14830_COM_ERR;
        }
    }
    else
    {
        sts = MAX14830_COM_ERR;
    }
    max14830_hdl->gpio_write(gpio_a, MAX14830_GPIO_PIN_11, MAX14830_GPIO_SET);
    return sts;
}

/*
 * @brief This API read a burst of bytes from the MAX14830
 */
static e_max14830_ret_sts max14830_spi_gets(s_max14830_hdle *max14830_hdl,unsigned int port,unsigned int len,unsigned char *ptr,uint8_t reg)
{
    e_max14830_ret_sts sts;
    uint8_t cmd_byte=0;
    max14830_hdl->gpio_write(gpio_a, MAX14830_GPIO_PIN_11, MAX14830_GPIO_RESET);
    cmd_byte = (port & 0x60) | (reg & 0x1F);
    //port &= 0x7f;
    if(transmit_wrapper(max14830_hdl,(uint8_t *)&cmd_byte, 1, 100)==MAX14830_SCS)
    {
        if(receive_wrapper(max14830_hdl,(uint8_t *)ptr,len,100)==MAX14830_SCS)
        {
            sts = MAX14830_SCS;
        }
        else
        {
            sts = MAX14830_COM_ERR;
        }
    }
    else
    {
        sts = MAX14830_COM_ERR;
    }
    max14830_hdl->gpio_write(gpio_a, MAX14830_GPIO_PIN_11, MAX14830_GPIO_SET);
    return sts;
}
#endif

/*
 * @brief This API transmit the data through SPI interface
 */
static e_max14830_ret_sts transmit_wrapper(s_max14830_hdle *max14830_hdl, uint8_t *buffer, uint16_t length, uint32_t timeout)
{
    e_max14830_ret_sts sts=MAX14830_ERR;
    if(max14830_hdl->intf_id == MAX14830_SPI_INTF)
    {
        if(osSemaphoreAcquire(transmit_semhandle,MAX14830_WAIT_FOREVER) == pdTRUE)
        {
            if(HAL_SPI_Transmit(max14830_hdl->io_intf_hdle, buffer, length, timeout) == HAL_OK)
            {
                //sts = max14830_hdl->spi_write(max14830_hdl->io_intf_hdle,buffer,length,timeout);
                //   if(sts == MAX14830_SCS)
                // {
                sts = MAX14830_SCS;
                // }
            }
            else
            {
                sts = MAX14830_ERR;
            }
        }
        else
        {
            sts = pdFALSE;
        }
        osSemaphoreRelease(transmit_semhandle);
        //sem_give(transmit_semhandle);
    }
    else if(max14830_hdl->intf_id == MAX14830_I2C_INTF)
    {
        //TODO
    }
    else
    {
        printf(("Invalid interface\n"));
    }
    return sts;
}

/*
 * @brief This API receive the data through SPI interface
 */
static e_max14830_ret_sts receive_wrapper(s_max14830_hdle *max14830_hdl, uint8_t *buffer, uint16_t length, uint32_t timeout)
{
    e_max14830_ret_sts sts=MAX14830_ERR;
    if(max14830_hdl->intf_id == MAX14830_SPI_INTF)
    {
        if(osSemaphoreAcquire(transmit_semhandle,MAX14830_WAIT_FOREVER) == pdTRUE)
        {
            if(HAL_SPI_Receive(max14830_hdl->io_intf_hdle,buffer,length,timeout) == HAL_OK)
            {
                //        sts = max14830_hdl->spi_read(max14830_hdl->io_intf_hdle,buffer,length,timeout);
                //        if(sts == MAX14830_SCS)
                //        {
                sts = MAX14830_SCS;
                //}
            }
            else
            {
                sts = MAX14830_ERR;
            }
        }
        else
        {
            sts = pdFALSE;
        }
        osSemaphoreRelease(recieve_semhandle);
    }
    //        sem_give(recieve_semhandle);
    else if(max14830_hdl->intf_id == MAX14830_I2C_INTF)
    {
        //TODO
    }
    else
    {
        printf(("Invalid interface\n"));
    }
    return sts;
}

void MAX14830_port_irq()
{
    //uint8_t data;
    //data = 1;
    flag=1;
#if 0
    struct uart_port *port = &s->p[portno].port;
    irqreturn_t res = IRQ_NONE;

    do {
        unsigned int ists, lsr, rxlen;

        /* Read IRQ status & RX FIFO level */
        ists = MAX14830_SPI_Read(port, MAX14830_IRQSTS_REG);
        rxlen = MAX14830_SPI_Read(port, MAX14830_RXFIFOLVL_REG);
        if (!ists && !rxlen)
            break;

        res = IRQ_HANDLED;

        if (ists & MAX14830_IRQ_CTS_BIT) {
            lsr = MAX14830_port_read(port, MAX14830_LSR_IRQSTS_REG);
            uart_handle_cts_change(port, lsr & MAX14830_LSR_CTS_BIT);
        }
        if (rxlen)
            MAX14830_handle_rx(port, rxlen);
    } while (1);
    return res;
#endif
}

e_max14830_ret_sts max14830_self_test(s_max14830_hdle *inst_hdl)
{
    e_max14830_ret_sts sts = 0;
    uint8_t write_data = MAX14830_FIFO_TRIG_LVL_CFG;
    uint8_t read_data = 0;

    if(max14830_write(inst_hdl ,MAX14830_CH0 ,MAX14830_FIFOTRIGLVL_REG ,1 ,&write_data) == MAX14830_SCS)
    {
        if(max14830_read(inst_hdl ,MAX14830_CH0 ,MAX14830_FIFOTRIGLVL_REG ,1 ,&read_data) == MAX14830_SCS)
        {
            if(write_data == read_data)
            {
                sts = MAX14830_SCS;
            }
            else
            {
                sts = MAX14830_ERR;
            }
        }
    }
    return sts;
}

void spi_uart_init_func(uint8_t ahw_id)
{
    switch(ahw_id)
    {
    case UART_EXPANDER_MAX14830_OBC:
        spi_uart_max1430.io_intf_hdle = &hspi2;
        spi_uart_max1430.spi_read = (max14830_read_spi_fptr_t)max14830_read;
        spi_uart_max1430.spi_write =(max14830_read_spi_fptr_t)max14830_write;
        spi_uart_max1430.cs_port = (uint32_t)GPIOA;
        spi_uart_max1430.cs_pin = 11;
        max14830_init(&spi_uart_max1430);
        max14830_uart_init(&spi_uart_max1430,MAX14830_CH0);
        break;
    default:
        break;
    }
}

#endif
;
