/**
 * @file comms_sband_init.c
 *
 * @brief S-band initialization functions
 *
 * This file contains functions to initialize the S-band communication
 * subsystem, including:
 * - S-band driver initialization
 * - S-band controller thread creation
 * - S-band IQ stream thread creation 
 * 
 * Initialization includes configuring S-band parameters, setting up 
 * required OS objects like threads, mutexes, message queues, etc.
 * 
 * The main initialization function is comms_sband_init() which should be 
 * called during system startup to initialize the S-band subsystem.
 * 
 * Other functions like comms_sband_ctrl_thread() and comms_sband_iq_thread()
 * are internal functions to create the controller and IQ threads respectively.
 *
 * @copyright Copyright 2023 Antaris, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#include "comms_sband_init.h"
#include "comms_sband_intf.h"
#include "comms_sband_api_map.h"
#include "sdr_app_main.h"
#include "comms_sband_tmr.h"
#include "logger.h"
#include "nvm.h"
#include "comms_sband_xlink_api.h"
#include "comms_sband_xlink_sock.h"
#include "comms_sband_xlink_ss.h"

#include "exo_io_al_rtc_common.h"
#include "exo_io_al_sos_timer.h"
#include "exo_common.h"

s_comms_tx_cfg PLACE_IN_EXT_RAM_MEM tx_cfg_global;///< TX config rollback in external RAM
s_comms_rx_cfg PLACE_IN_EXT_RAM_MEM rx_cfg_global;///< RX config rollback in external RAM
s_comms_sys_cfg PLACE_IN_EXT_RAM_MEM sys_cfg_global;///< System config struct in external RAM
s_comms_tx_cfg PLACE_IN_EXT_RAM_MEM tx_cfg_rb;///< TX config rollback struct in external RAM
s_comms_rx_cfg PLACE_IN_EXT_RAM_MEM rx_cfg_rb;///< RX config rollback struct in external RAM
s_comms_sys_cfg PLACE_IN_EXT_RAM_MEM sys_cfg_rb;///< System config rollback struct in external RAM
s_comms_cal_cfg PLACE_IN_EXT_RAM_MEM cal_cfg_global; ///< Calibration config global struct in external RAM
s_comms_tm_prop PLACE_IN_EXT_RAM_MEM tm_prop_global;///< TM properties global struct in external RAM

s_comms_tx_gen_cfg PLACE_IN_EXT_RAM_MEM sband_s_tx_cfg; ///< S-band TX general config struct in external RAM
s_comms_rx_gen_cfg PLACE_IN_EXT_RAM_MEM sband_s_rx_cfg; ///< S-band RX general config struct in external RAM

s_comms_xlinks_tx_cfg PLACE_IN_EXT_RAM_MEM iqs_tx_cfg_global;///< IQS TX config global struct in external RAM
s_comms_xlinks_tx_cfg PLACE_IN_EXT_RAM_MEM iqs_tx_cfg_rb; ///< IQS TX config rollback struct in external RAM
s_comms_xlinks_rx_cfg PLACE_IN_EXT_RAM_MEM iqs_rx_cfg_global;///< IQS RX config global struct in external RAM
s_comms_xlinks_rx_cfg PLACE_IN_EXT_RAM_MEM iqs_rx_cfg_rb; ///< IQS RX config rollback struct in external RAM
s_comms_xlinks_dev_rssi_tx_atten PLACE_IN_EXT_RAM_MEM iqs_tx_rx_atten_glob; ///< IQS TX/RX attenuation global struct in external RAM
s_comms_xlinks_timeout PLACE_IN_EXT_RAM_MEM iqs_tim_out_glob;///< IQS timeout global struct in external RAM
s_comms_xlinks_gnd_cnt_duration PLACE_IN_EXT_RAM_MEM iqs_gnd_cont_dur_glob;///< IQS ground contact duration global struct in external RAM
s_comms_xlinks_fw_version PLACE_IN_EXT_RAM_MEM iqs_fw_ver_glob;///< IQS firmware version global struct in external RAM
s_comms_xlinks_dev_prd_key PLACE_IN_EXT_RAM_MEM iqs_prod_key_glob;///< IQS product key global struct in external RAM  
s_comms_xlinks_net_prop_cfg PLACE_IN_EXT_RAM_MEM iqs_net_prop_glob;///< IQS network properties global struct in external RAM
extern s_sdr_sens_cfg PLACE_IN_EXT_RAM_MEM sband_sens_cfg;///< S-band sensitivity config struct in external RAM

uint8_t s_comms_hk_upd_id = 0;///< Housekeeping update ID variable in external RAM
uint8_t is_comms_hk_upd_id_fill = 0; ///< Housekeeping update ID fill flag in external RAM
extern uint8_t bch_dec_param[3];

extern s_obc_sock_info obc_iqs_sim_soc1_inf;
extern s_sdr_tmr_cfg PLACE_IN_EXT_RAM_MEM sband_tmr_cfg; ///< S-band timer config struct in external RAM
extern s_sdr_rssi_cfg PLACE_IN_EXT_RAM_MEM sband_rssi_cfg; ///< S-band RSSI config struct in external RAM

extern SERVICE_COMMON_TC_STRUCT PLACE_IN_EXT_RAM_MEM 	sband_serv_tc; ///< S-band service common TC struct
extern SERVICE_COMMON_STRUCT PLACE_IN_EXT_RAM_MEM	sband_serv_common; ///< S-band service common struct
extern SERVICE_IDLE_STRUCT PLACE_IN_EXT_RAM_MEM	sband_serv_idle; ///< S-band service idle struct
extern SERVICE_RESET_STRUCT PLACE_IN_EXT_RAM_MEM sband_serv_reset; ///< S-band service reset struct
extern SERVICE_IP_ADR_STRUCT  PLACE_IN_EXT_RAM_MEM    sband_serv_ip_adr; ///< S-band service IP address struct
extern SERVICE_VERSION_STRUCT	 PLACE_IN_EXT_RAM_MEM   sband_serv_version; ///< S-band service version struct
extern SERVICE_VERSION_STRUCT_GET PLACE_IN_EXT_RAM_MEM  sband_serv_version_get; ///< S-band service get version struct
extern SERVICE_VERSION_STRUCT_GET PLACE_IN_EXT_RAM_MEM  sband_serv_version_set; ///< S-band service set version struct  
extern SERVICE_START_RF_RCV_STRUCT  PLACE_IN_EXT_RAM_MEM   sband_serv_start_rf_rcv; ///< S-band service start RF receive struct
extern SERVICE_RF_XMT_DATA_STRUCT	PLACE_IN_EXT_RAM_MEM	sband_serv_rf_xmt_data; ///< S-band service RF transmit data struct
extern SERVICE_DEVICE_CONF_STRUCT PLACE_IN_EXT_RAM_MEM 	sband_serv_device_conf; ///< S-band service device configuration struct
extern SERVICE_HOUSE_KEEP_STRUCT  PLACE_IN_EXT_RAM_MEM 	sband_serv_house_keep; ///< S-band service housekeeping struct
extern SERVICE_FEATURE_SELECT_STRUCT PLACE_IN_EXT_RAM_MEM	sband_serv_feature_select; ///< S-band service feature selection struct
extern SERVICE_DVBS2_CONF_STRUCT PLACE_IN_EXT_RAM_MEM   sband_serv_dvbs2_cfg; ///< S-band service DVBS2 configuration struct
extern SERVICE_XPA_INF_STRUCT	PLACE_IN_EXT_RAM_MEM  sband_serv_xpa_inf; ///< S-band service XPA info struct
extern s_comms_csp_tm PLACE_IN_EXT_RAM_MEM csp_tm_global; ///< CSP TM global struct
extern s_comms_tx_tm PLACE_IN_EXT_RAM_MEM tx_tm_cfg; ///< S-band TX TM configuration struct
extern s_comms_rx_tm_xlink PLACE_IN_EXT_RAM_MEM rx_tm_cfg; ///< S-band RX TM crosslink configuration struct  
extern s_comms_tm_prop PLACE_IN_EXT_RAM_MEM  xlink_sys_param; ///< S-band crosslink system parameters struct
extern s_comms_cal_cfg PLACE_IN_EXT_RAM_MEM cal_cfg_global; ///< S-band calibration configuration struct
extern s_sdr_tm_cfg PLACE_IN_EXT_RAM_MEM sband_tm_cfg; ///< S-band TM configuration struct
extern s_sdr_cfg PLACE_IN_EXT_RAM_MEM sband_cfg;
extern s_sdr_sband_mh_info PLACE_IN_EXT_RAM_MEM sband_mh_info; ///< S-band message handler info struct
extern s_sband_periodic_get_tm PLACE_IN_EXT_RAM_MEM xlink_sband_tm_store; ///< S-band crosslink periodic TM storage struct
extern uint32 PLACE_IN_EXT_RAM_MEM tx_udp_frame; ///< TX UDP frame counter
extern uint32 PLACE_IN_EXT_RAM_MEM rx_udp_frame; ///< RX UDP frame counter
extern volatile uint8_t PLACE_IN_EXT_RAM_MEM sband_sch_gs_contact; ///< S-band scheduled ground station contact flag 
extern uint8_t PLACE_IN_EXT_RAM_MEM comms_otsu_cb_sts; ///< Otsu callback status 
extern uint8_t PLACE_IN_EXT_RAM_MEM comms_sband_otsu_gs_contact; ///< S-band Otsu ground station contact flag
extern uint32_t PLACE_IN_EXT_RAM_MEM tm_store_cnt; ///< TM storage counter  
extern uint32_t PLACE_IN_EXT_RAM_MEM sband_beacon_seq_num; ///< S-band beacon sequence number
extern uint8_t PLACE_IN_EXT_RAM_MEM comms_sband_first_gs_contact; ///< S-band first ground station contact flag
extern uint8_t PLACE_IN_EXT_RAM_MEM beacon_en; ///< Beacon enable flag
extern uint8_t PLACE_IN_EXT_RAM_MEM comms_first_gs_contact; ///< First ground station contact flag
extern uint8_t PLACE_IN_EXT_RAM_MEM comms_otsu_gs_contact; ///< Otsu ground station contact flag
extern uint8 PLACE_IN_EXT_RAM_MEM sband_need_ss;
extern uint8_t PLACE_IN_EXT_RAM_MEM curr_rx;
extern uint16_t PLACE_IN_EXT_RAM_MEM sband_tc_tm_id;
extern uint8_t PLACE_IN_EXT_RAM_MEM sband_fw_cfg_failure_cnt;
extern uint32_t PLACE_IN_EXT_RAM_MEM sband_fw_cfg_size;
extern uint32 PLACE_IN_EXT_RAM_MEM sband_NumByteForAi;
extern uint32 PLACE_IN_EXT_RAM_MEM sband_NumByteForAiHigh;
extern uint32 PLACE_IN_EXT_RAM_MEM sband_NumByteForAiLow;
extern uint16_t PLACE_IN_EXT_RAM_MEM version_info_size;
extern uint8 PLACE_IN_EXT_RAM_MEM rssi_lut_id;
extern uint8  PLACE_IN_EXT_RAM_MEM tmrand;
extern uint32_t PLACE_IN_EXT_RAM_MEM csp_data_count;
extern uint8 PLACE_IN_EXT_RAM_MEM pat_chng;
extern uint8_t PLACE_IN_EXT_RAM_MEM sband_radio_id;
extern uint32 PLACE_IN_EXT_RAM_MEM sband_RcvDataServerTimeout;
extern uint32 PLACE_IN_EXT_RAM_MEM sband_RcvDataIPAdr;                 
extern uint32 PLACE_IN_EXT_RAM_MEM sband_RcvDataIPPort;               
extern uint8 PLACE_IN_EXT_RAM_MEM  sband_RcvDataIPFormat;   
extern int PLACE_IN_EXT_RAM_MEM iqs_connfd;
extern int PLACE_IN_EXT_RAM_MEM iqs_sockfd;
extern uint8_t PLACE_IN_EXT_RAM_MEM sband_xlink_sock_sts;    
extern uint16_t PLACE_IN_EXT_RAM_MEM sband_tc_seq_no;
extern uint32_t PLACE_IN_EXT_RAM_MEM rx_sync_state; 
extern uint32_t PLACE_IN_EXT_RAM_MEM tm_read_cnt;
extern uint8_t PLACE_IN_EXT_RAM_MEM rssi_logic_en;
extern uint32 PLACE_IN_EXT_RAM_MEM sband_xlink_rf_pwr_global;
extern uint8_t PLACE_IN_EXT_RAM_MEM rx_rssi_tm;
extern uint32_t PLACE_IN_EXT_RAM_MEM valid_rssi[MAX_RX_CH];
extern uint32_t PLACE_IN_EXT_RAM_MEM inv_rssi[MAX_RX_CH];
extern uint8_t PLACE_IN_EXT_RAM_MEM  avg_rssi_valid[MAX_RX_CH];
extern float PLACE_IN_EXT_RAM_MEM avg_rssi[MAX_RX_CH];
extern uint8_t PLACE_IN_EXT_RAM_MEM rx_sync[MAX_RX_CH];
extern uint8 PLACE_IN_EXT_RAM_MEM  sband_RcvDataServerMacAdr[6];
extern uint8_t  PLACE_IN_EXT_RAM_MEM iqs_rx_buff[IQS_MTU_SIZE];
extern uint8_t  PLACE_IN_EXT_RAM_MEM iqs_tx_buff[IQS_MTU_SIZE];
extern uint8_t  PLACE_IN_EXT_RAM_MEM iqs_rcv_buff[CLTU_SIZE];
extern uint8_t PLACE_IN_EXT_RAM_MEM comms_csw_rx_buf[512];

extern s_sdr_beacon_pld sband_beacon_data;

/**
 * @brief This function is used to initialize S-Band configuration
 * This function initializes the S-band configuration structure 
 * with default values.
 */
void comms_init_sband_cfg(void)
{
    os_memset(&tx_cfg_global,0,sizeof(s_comms_tx_cfg));
    os_memset(&rx_cfg_global,0,sizeof(s_comms_rx_cfg));
    os_memset(&sys_cfg_global,0,sizeof(s_comms_sys_cfg));
    os_memset(&tx_tm_cfg,0,sizeof(s_comms_tx_tm));
    os_memset(&rx_tm_cfg,0,sizeof(s_comms_rx_tm_xlink));
    os_memset(&xlink_sys_param,0,sizeof(s_comms_tm_prop));
    os_memset(&csp_tm_global,0,sizeof(s_comms_csp_tm));
    os_memset(&cal_cfg_global,0,sizeof(s_comms_cal_cfg));
    os_memset(&tm_prop_global,0,sizeof(s_comms_tm_prop));
    os_memset(&sband_s_tx_cfg,0,sizeof(s_comms_tx_gen_cfg));
    os_memset(&sband_s_rx_cfg,0,sizeof(s_comms_rx_gen_cfg));
    os_memset(&sband_serv_house_keep,0,sizeof(SERVICE_HOUSE_KEEP_STRUCT));
    os_memset(&iqs_tx_cfg_global,0,sizeof(s_comms_xlinks_tx_cfg));
    os_memset(&iqs_rx_cfg_global,0,sizeof(s_comms_xlinks_rx_cfg));
    os_memset(&iqs_tx_rx_atten_glob,0,sizeof(s_comms_xlinks_dev_rssi_tx_atten));
    os_memset(&xlink_sband_tm_store,0,sizeof(s_sband_periodic_get_tm));
    os_memset(&iqs_tim_out_glob,0,sizeof(s_comms_xlinks_timeout));
    os_memset(&iqs_gnd_cont_dur_glob,0,sizeof(s_comms_xlinks_gnd_cnt_duration));
    os_memset(&iqs_fw_ver_glob,0,sizeof(s_comms_xlinks_fw_version));
    os_memset(&iqs_prod_key_glob,0,sizeof(s_comms_xlinks_dev_prd_key));
    os_memset(&iqs_net_prop_glob,0,sizeof(s_comms_xlinks_net_prop_cfg));
    os_memset(&sband_sens_cfg,0,sizeof(s_sdr_sens_cfg));
    os_memset(&sband_tmr_cfg,0,sizeof(s_sdr_tmr_cfg));
    os_memset(&sband_rssi_cfg,0,sizeof(s_sdr_rssi_cfg));
    os_memset(&sband_cfg,0,sizeof(s_sdr_cfg));
    os_memset(&sband_tm_cfg,0,sizeof(s_sdr_tm_cfg));
    os_memset(&sband_mh_info,0,sizeof(s_sdr_sband_mh_info));
    os_memset(&sband_serv_tc,0,sizeof(SERVICE_COMMON_TC_STRUCT));
    os_memset(&sband_serv_common,0,sizeof(SERVICE_COMMON_STRUCT));
    os_memset(&sband_serv_idle,0,sizeof(SERVICE_IDLE_STRUCT));
    os_memset(&sband_serv_reset,0,sizeof(SERVICE_RESET_STRUCT));
    os_memset(&sband_serv_ip_adr,0,sizeof(SERVICE_IP_ADR_STRUCT));
    os_memset(&sband_serv_version,0,sizeof(SERVICE_VERSION_STRUCT));
    os_memset(&sband_serv_version_get,0,sizeof(SERVICE_VERSION_STRUCT_GET));
    os_memset(&sband_serv_version_set,0,sizeof(SERVICE_VERSION_STRUCT_GET));
    os_memset(&sband_serv_start_rf_rcv,0,sizeof(SERVICE_START_RF_RCV_STRUCT));
    os_memset(&sband_serv_rf_xmt_data,0,sizeof(SERVICE_RF_XMT_DATA_STRUCT));
    os_memset(&sband_serv_device_conf,0,sizeof(SERVICE_DEVICE_CONF_STRUCT));
    os_memset(&sband_serv_feature_select,0,sizeof(SERVICE_FEATURE_SELECT_STRUCT));
    os_memset(&sband_serv_dvbs2_cfg,0,sizeof(SERVICE_DVBS2_CONF_STRUCT));
    os_memset(&sband_serv_xpa_inf,0,sizeof(SERVICE_XPA_INF_STRUCT));

    os_memset(comms_csw_rx_buf,0,sizeof(comms_csw_rx_buf));
    os_memset(valid_rssi,0,sizeof(valid_rssi));
    os_memset(inv_rssi,0,sizeof(inv_rssi));
    os_memset(avg_rssi_valid,0,sizeof(avg_rssi_valid));
    os_memset(avg_rssi,0,sizeof(avg_rssi));
    os_memset(rx_sync,0,sizeof(rx_sync));
    os_memset(sband_RcvDataServerMacAdr,0,sizeof(sband_RcvDataServerMacAdr));
    os_memset(iqs_rx_buff,0,sizeof(iqs_rx_buff));
    os_memset(iqs_tx_buff,0,sizeof(iqs_tx_buff));
    os_memset(iqs_rcv_buff,0,sizeof(iqs_rcv_buff));

    os_memset(&sband_beacon_data,0,sizeof(s_sdr_beacon_pld));

    tx_udp_frame =0;
    rx_udp_frame =0;
    sband_sch_gs_contact =0;
    comms_otsu_cb_sts =0;
    comms_sband_otsu_gs_contact =0;
    tm_store_cnt =0;
    sband_beacon_seq_num =0;
    s_comms_hk_upd_id =0;
    is_comms_hk_upd_id_fill =0;
    comms_otsu_gs_contact =0;
    comms_sband_first_gs_contact =0;
    beacon_en =1;
    comms_first_gs_contact =0;
    sband_need_ss =0;
    curr_rx =0;
    sband_tc_tm_id =0;
    sband_fw_cfg_failure_cnt =0;
    sband_fw_cfg_size =0;
    sband_NumByteForAi =0;
    sband_NumByteForAiHigh =0;
    sband_NumByteForAiLow =0;
    version_info_size =0;
#ifdef S_BAND_SIM_CB
    rssi_lut_id =0;
    tmrand =0;
#endif
    csp_data_count =0;
    pat_chng =0;
    sband_radio_id =0;
    sband_RcvDataServerTimeout =0;
    sband_RcvDataIPAdr =0;                 
    sband_RcvDataIPPort =0;               
    sband_RcvDataIPFormat =0;   
    sband_xlink_rf_pwr_global =0;
    iqs_connfd =0;     
    iqs_sockfd =0;   
    sband_xlink_sock_sts =0;    
    sband_tc_seq_no =0;
    rx_sync_state =0;
    tm_read_cnt =0;
    rssi_logic_en =1;
    rx_rssi_tm =0;     

    bch_dec_param[0] = 1;
    bch_dec_param[1] = 0;
    bch_dec_param[2] = 0;

#ifdef SDR_SBAND_SRS4
    comms_init_sys_cfg(&sys_cfg_global);
    comms_init_cal_cfg(&cal_cfg_global);
    comms_init_tx_cfg(&tx_cfg_global);
    comms_init_rx_cfg(&rx_cfg_global);
#endif

    comms_init_iqs_cfg();

    comms_sband_timer_init_default();

    //comms_sband_nvm_init();

    comms_sband_timer_init();
}

/** 
 * @brief Initialize S-band timer configuration.
 *
 * This function initializes the default S-band timer configuration.
 */
void comms_sband_timer_init_default(void)
{
    sband_tmr_cfg.beacon_enb_tmr = 3*60*1000; // 3 minutes
    sband_tmr_cfg.beacon_prd_tmr = 10*1000; // 10 seconds
    sband_tmr_cfg.beacon_rep_tmr = 2*1000; // 2 second
    sband_tmr_cfg.sdr_tm_tx_tmr = 2*60*1000; // 2 minute
    sband_tmr_cfg.sdr_tx_on_tmr = 30*1000; // 30 seconds
    sband_tmr_cfg.sdr_rx_on_tmr = 60*1000; // 20 seconds

    sband_tmr_cfg.sdr_tm_read_tmr = 2*60*1000; // 2 seconds
    sband_rssi_cfg.rssi_prd_tmr = 30*1000;
    sband_rssi_cfg.long_rx_on_tmr = 10*60*1000;
    sband_rssi_cfg.short_rx_on_tmr = 1*60*1000;
    sband_rssi_cfg.valid_rssi_cnt = 10;
    sband_rssi_cfg.inv_rssi_cnt = 5;

    sband_sens_cfg.volt_sensor[0].volt_sens_max_thrs = 115;
    sband_sens_cfg.volt_sensor[0].volt_sens_min_thrs = 75;
    sband_sens_cfg.volt_sensor[1].volt_sens_max_thrs = 200;
    sband_sens_cfg.volt_sensor[1].volt_sens_min_thrs = 160;
    sband_sens_cfg.volt_sensor[2].volt_sens_max_thrs = 115;
    sband_sens_cfg.volt_sensor[2].volt_sens_min_thrs = 75;
    sband_sens_cfg.volt_sensor[3].volt_sens_max_thrs = 120;
    sband_sens_cfg.volt_sensor[3].volt_sens_min_thrs = 80;
    sband_sens_cfg.volt_sensor[4].volt_sens_max_thrs = 200;
    sband_sens_cfg.volt_sensor[4].volt_sens_min_thrs = 160;
    sband_sens_cfg.volt_sensor[5].volt_sens_max_thrs = 155;
    sband_sens_cfg.volt_sensor[5].volt_sens_min_thrs = 115;

    sband_sens_cfg.temp_sensor[0].temp_sens_typ_thrs = 6500; //sdr_nvm_param[2].temp_sens_typ_thrs[0];
    sband_sens_cfg.temp_sensor[1].temp_sens_typ_thrs = 6500; //sdr_nvm_param[2].temp_sens_typ_thrs[1];
    sband_sens_cfg.temp_sensor[2].temp_sens_typ_thrs = 6500; //sdr_nvm_param[2].temp_sens_typ_thrs[2];
    sband_sens_cfg.temp_sensor[0].temp_sens_max_thrs = 8000; //sdr_nvm_param[2].temp_sens_max_thrs[0];
    sband_sens_cfg.temp_sensor[1].temp_sens_max_thrs = 8000; //sdr_nvm_param[2].temp_sens_max_thrs[1];
    sband_sens_cfg.temp_sensor[2].temp_sens_max_thrs = 8000; //sdr_nvm_param[2].temp_sens_max_thrs[2];

    DEBUG_CPRINT(("\nsband_tmr_cfg.beacon_enb_tmr %d \n", sband_tmr_cfg.beacon_enb_tmr));
    DEBUG_CPRINT(("\nsband_tmr_cfg.beacon_prd_tmr %d \n", sband_tmr_cfg.beacon_prd_tmr));
    DEBUG_CPRINT(("\nsband_tmr_cfg.beacon_rep_tmr %d \n", sband_tmr_cfg.beacon_rep_tmr));
    DEBUG_CPRINT(("\nsband_tmr_cfg.beacon_tm-tx_tmr %d \n", sband_tmr_cfg.sdr_tm_tx_tmr));
    DEBUG_CPRINT(("\nsband_tmr_cfg.beacon_tx_on %d \n", sband_tmr_cfg.sdr_tx_on_tmr));
    DEBUG_CPRINT(("\nsband_tmr_cfg.beacon_rx_on %d \n", sband_tmr_cfg.sdr_rx_on_tmr));
    DEBUG_CPRINT(("\nsband_tmr_cfg.beacon_tm_read %d \n", sband_tmr_cfg.sdr_tm_read_tmr));
    DEBUG_CPRINT(("\nsband_tmr_cfg.rssi_prd_timer %d \n", sband_rssi_cfg.rssi_prd_tmr));


    sband_rssi_cfg.rssi_typ = -90;
    sband_rssi_cfg.rssi_min = -105;

}

/**
 * @brief This function is used to initialize S-Band system configuration
 * 
 * @brief Initialize S-band timer configuration.
 *
 * This function initializes the default S-band timer configuration.
 */
void comms_init_sys_cfg(s_comms_sys_cfg *sys_cfg)
{
    sys_cfg->boot_cfg.sys_reboot              = 0;
    sys_cfg->gwdt_cfg.sys_gwdt_init           = 86400;
    sys_cfg->gwdt_cfg.sys_gwdt_counter        = 0;
    sys_cfg->gwdt_cfg.sys_gwdt_reset          = 0;
    sys_cfg->csp_cfg.sys_csp_address          = 24;
    sys_cfg->can_cfg.sys_can_rate             = 1000000;
    sys_cfg->can_cfg.sys_can_promisc          = COMMS_TRUE;
    sys_cfg->uart_cfg.sys_uart_rate           = 1000000;
    sys_cfg->uart_cfg.sys_uart_multidrop      = COMMS_FALSE;
    sys_cfg->net_cfg.sys_net_enable           = COMMS_FALSE;
    sys_cfg->net_cfg.sys_net_en_prefix        = 24;
    sys_cfg->net_cfg.sys_net_rf_prefix        = 24;

    sys_cfg->comms_sys_name_cnt = MAX_COMMS_SYS_NAME_CNT;
    sys_cfg->csp_cfg.sys_csp_routes_cnt = MAX_SYS_CSP_ROUTES_CNT;
    sys_cfg->net_cfg.sys_net_en_ip_cnt = MAX_SYS_NET_EN_IP_CNT;
    sys_cfg->net_cfg.sys_net_en_gw_cnt = MAX_SYS_NET_EN_GW_CNT;
    sys_cfg->net_cfg.sys_net_rf_ip_cnt = MAX_SYS_NET_RF_IP_CNT;
    sys_cfg->net_cfg.sys_net_rf_gw_cnt = MAX_SYS_NET_RF_GW_CNT;

    sys_cfg_rb.comms_sys_name_cnt = MAX_COMMS_SYS_NAME_CNT;
    sys_cfg_rb.csp_cfg.sys_csp_routes_cnt = MAX_SYS_CSP_ROUTES_CNT;
    sys_cfg_rb.net_cfg.sys_net_en_ip_cnt = MAX_SYS_NET_EN_IP_CNT;
    sys_cfg_rb.net_cfg.sys_net_en_gw_cnt = MAX_SYS_NET_EN_GW_CNT;
    sys_cfg_rb.net_cfg.sys_net_rf_ip_cnt = MAX_SYS_NET_RF_IP_CNT;
    sys_cfg_rb.net_cfg.sys_net_rf_gw_cnt = MAX_SYS_NET_RF_GW_CNT;

    strcpy((char*)&sys_cfg->sys_name[0],"srs-4");
    strcpy((char*)&sys_cfg->csp_cfg.sys_csp_routes[0],"0/0 CAN,10/5 SPACE");
    strcpy((char*)&sys_cfg->net_cfg.sys_net_en_ip[0],"192.168.100.2");
    strcpy((char*)&sys_cfg->net_cfg.sys_net_en_gw[0],"192.168.100.1");
    strcpy((char*)&sys_cfg->net_cfg.sys_net_rf_ip[0],"192.168.200.2");
    strcpy((char*)&sys_cfg->net_cfg.sys_net_rf_gw[0],"192.168.200.1");
}

/**
 * @brief This function is used to initialize S-Band Calibration configuration
 *
 * @brief Initialize calibration configuration.
 * 
 * @param cal_cfg Pointer to calibration config structure.
 */
void comms_init_cal_cfg(s_comms_cal_cfg *cal_cfg)
{
    cal_cfg->cal_ps_gain             = 4.774490573;
    cal_cfg->cal_ps_intercept        = 0.039190728;
    cal_cfg->cal_vctcxo              = 1500;
}

/**
 * @brief This function is used to initialize S-Band transmission configuration
 *
 * @brief Initialize TX configuration.
 *
 * @param tx_cfg Pointer to TX config structure. 
 */
void comms_init_tx_cfg(s_comms_tx_cfg *tx_cfg)
{
    memset(tx_cfg->crypto_cfg.crypto_key,0, sizeof(tx_cfg->crypto_cfg.crypto_key));

    tx_cfg->tx_cfg_freq                        = 2242500000;
    tx_cfg->tx_cfg_type                        = 0;
    tx_cfg->tx_cfg_rate                        = 1000000;
    tx_cfg->tx_cfg_rolloff                     = 1;
    tx_cfg->tx_cfg_pout                        = 33;
    tx_cfg->tx_cfg_alc_mode                    = 1;
    tx_cfg->tx_cfg_rs                          = COMMS_TRUE;
    tx_cfg->tx_cfg_cc                          = COMMS_TRUE;
    tx_cfg->tx_cfg_rand                        = COMMS_TRUE;
    tx_cfg->tx_cfg_crc                         = COMMS_TRUE;
    tx_cfg->tx_cfg_idletime                    = 30;
    tx_cfg->tx_cfg_size                        = 217;
    tx_cfg->tx_cfg_id                          = 0;
    tx_cfg->crypto_cfg.crypto_encrypt          = COMMS_FALSE;
    tx_cfg->crypto_cfg.crypto_auth             = COMMS_FALSE;
    tx_cfg->tx_cfg_pa_templimit                = 80;
    tx_cfg->crypto_cfg.comms_tx_crypto_key_cnt = MAX_COMMS_TX_CRYPTO_KEY_CNT;

    tx_cfg_rb.crypto_cfg.comms_tx_crypto_key_cnt = MAX_COMMS_TX_CRYPTO_KEY_CNT;
}

/**
 * @brief This function is used to initialize S-Band reception configuration
 *
 * @brief Initialize RX configuration. 
 * 
 * @param rx_cfg Pointer to RX config structure.
 */
void comms_init_rx_cfg(s_comms_rx_cfg *rx_cfg)
{
    memset(rx_cfg->crypto_cfg.crypto_key,0,sizeof(rx_cfg->crypto_cfg.crypto_key));

    rx_cfg->rx_cfg_freq                         = 2042500000;
    rx_cfg->rx_cfg_type                         = 0;
    rx_cfg->rx_cfg_rate                         = 500000;
    rx_cfg->rx_cfg_rolloff                      = 1;
    rx_cfg->afc_cfg.rx_cfg_afc_enable           = COMMS_TRUE;
    rx_cfg->afc_cfg.rx_cfg_afc_range            = 15000;
    rx_cfg->rx_cfg_rs                           = COMMS_FALSE;
    rx_cfg->rx_cfg_cc                           = COMMS_TRUE;
    rx_cfg->rx_cfg_rand                         = COMMS_FALSE;
    rx_cfg->rx_cfg_crc                          = COMMS_TRUE;
    rx_cfg->rx_cfg_size                         = 217;
    rx_cfg->rx_cfg_id                           = 0;
    rx_cfg->crypto_cfg.crypto_decrypt           = COMMS_FALSE;
    rx_cfg->crypto_cfg.crypto_auth              = COMMS_FALSE;
    rx_cfg->crypto_cfg.comms_rx_crypto_key_cnt = MAX_COMMS_RX_CRYPTO_KEY_CNT;

    rx_cfg_rb.crypto_cfg.comms_rx_crypto_key_cnt = MAX_COMMS_RX_CRYPTO_KEY_CNT;
}

/**
 * @brief Initialize NVM for S-band configurations.
 * 
 * This function initializes the NVM storage for saving 
 * S-band configurations.
 */
void comms_sband_nvm_init(void)
{
#ifdef SDR_SBAND_SRS4
    comms_sband_cfg_nvm_read();
#endif
    comms_sband_xlinks_cfg_nvm_read();
}

/**
 * @brief This function is used to write S-Band configuration to NVM location
 *
 * @brief Save S-band configuration to NVM.
 * 
 * This function saves the current S-band configuration
 * to NVM storage.
 */
void comms_sband_cfg_nvm_write(void)
{
    nvm_parameter_write(NVM_DATA,NVM_SBAND_NAME,(uint8_t*)&sys_cfg_global.sys_name);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_BOOT_COUNT,(uint8_t*)&sys_cfg_global.boot_cfg.sys_bootcount);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_GWDT_INIT,(uint8_t*)&sys_cfg_global.gwdt_cfg.sys_gwdt_init);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_CSP_ADDRESS,(uint8_t*)&sys_cfg_global.csp_cfg.sys_csp_address);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_CSP_ROUTES,(uint8_t*)&sys_cfg_global.csp_cfg.sys_csp_routes);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_CAN_RATE,(uint8_t*)&sys_cfg_global.can_cfg.sys_can_rate);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_CAN_PROMISC,(uint8_t*)&sys_cfg_global.can_cfg.sys_can_promisc);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_UART_RATE,(uint8_t*)&sys_cfg_global.uart_cfg.sys_uart_rate);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_UART_MULTIDROP,(uint8_t*)&sys_cfg_global.uart_cfg.sys_uart_multidrop);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_IP_STACK_ENABLE,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_enable);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_ETH_IP_ADDRESS,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_en_ip);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_ETH_NET_PREFIX_BIT,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_en_prefix);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_ETH_GATEWAY_IP_ADDRESS,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_en_gw);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_SPACELINK_IP_ADDRESS,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_rf_ip);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_SPACELINK_NET_PREFIX_BIT,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_rf_prefix);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_SPACELINK_GATEWAY_IP_ADDRESS,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_rf_gw);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_PWR_SNS_GAIN,(uint8_t*)&cal_cfg_global.cal_ps_gain);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_PWR_SNS_INTERCEPT,(uint8_t*)&cal_cfg_global.cal_ps_intercept);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_VCTCXO,(uint8_t*)&cal_cfg_global.cal_vctcxo);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TRANS_FREQ,(uint8_t*)&tx_cfg_global.tx_cfg_freq);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TRANS_MOD_TYP,(uint8_t*)&tx_cfg_global.tx_cfg_type);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TRANS_SYMB_RATE,(uint8_t*)&tx_cfg_global.tx_cfg_rate);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TRANS_ROLL_OFF,(uint8_t*)&tx_cfg_global.tx_cfg_rolloff);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TRANS_PWR,(uint8_t*)&tx_cfg_global.tx_cfg_pout);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_ALC_MODE,(uint8_t*)&tx_cfg_global.tx_cfg_alc_mode);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TRANS_EN_REED_SOLOMON,(uint8_t*)&tx_cfg_global.tx_cfg_rs);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TRANS_EN_CONVOLUTIONAL,(uint8_t*)&tx_cfg_global.tx_cfg_cc);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TRANS_EN_RANDOMIZATION,(uint8_t*)&tx_cfg_global.tx_cfg_rand);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TRANS_EN_CRC_CHECKSUM,(uint8_t*)&tx_cfg_global.tx_cfg_crc);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_IDLE_TIME,(uint8_t*)&tx_cfg_global.tx_cfg_idletime);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_PAYLOAD_SIZE,(uint8_t*)&tx_cfg_global.tx_cfg_size);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_SATEELITE_ID,(uint8_t*)&tx_cfg_global.tx_cfg_id);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_ENCRYPT_KEY,(uint8_t*)&tx_cfg_global.crypto_cfg.crypto_key);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_ENCRYPT_FRAME,(uint8_t*)&tx_cfg_global.crypto_cfg.crypto_encrypt);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TRANS_CRYPTO_AUTH,(uint8_t*)&tx_cfg_global.crypto_cfg.crypto_auth);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_PA_TEMP_LIMIT,(uint8_t*)&tx_cfg_global.tx_cfg_pa_templimit);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RECEIVE_FREQ,(uint8_t*)&rx_cfg_global.rx_cfg_freq);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_MODULATION_TYP,(uint8_t*)&rx_cfg_global.rx_cfg_type);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RECEIVE_SYMB_RATE,(uint8_t*)&rx_cfg_global.rx_cfg_rate);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RECEIVE_ROLL_OFF,(uint8_t*)&rx_cfg_global.rx_cfg_rolloff);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_AFC_EN,(uint8_t*)&rx_cfg_global.afc_cfg.rx_cfg_afc_enable);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_AFC_RANGE,(uint8_t*)&rx_cfg_global.afc_cfg.rx_cfg_afc_range);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RECEIVE_EN_REED_SOLOMON,(uint8_t*)&rx_cfg_global.rx_cfg_rs);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RECEIVE_EN_CONVOLUTIONAL,(uint8_t*)&rx_cfg_global.rx_cfg_cc);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RECEIVE_EN_RANDOMIZATION,(uint8_t*)&rx_cfg_global.rx_cfg_rand);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RECEIVE_EN_CRC_CHECKSUM,(uint8_t*)&rx_cfg_global.rx_cfg_crc);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RECEIVE_PAYLOAD_SIZE,(uint8_t*)&rx_cfg_global.rx_cfg_size);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RECEIVE_SATELLITE_ID,(uint8_t*)&rx_cfg_global.rx_cfg_id);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_DECRYPT_KEY,(uint8_t*)&rx_cfg_global.crypto_cfg.crypto_key);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_DECRYPT_FRAME,(uint8_t*)&rx_cfg_global.crypto_cfg.crypto_decrypt);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RECIEVE_CRYPTO_AUTH,(uint8_t*)&rx_cfg_global.crypto_cfg.crypto_auth);
}


/**
 *@Brief: This function is used to write S-Band Xlink configuration to NVM location
 *
 * @brief Save S-band crosslinks configuration to NVM.
 *
 * This function saves the S-band crosslinks configuration
 * to NVM storage.
 */
void comms_sband_xlinks_cfg_nvm_write(void)
{

    iqs_rx_cfg_global.rx_freq=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_freq,MIN_RX_FREQ,MAX_RX_FREQ,DEFAULT_RX_FREQ);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_FREQ,(uint8_t*)&iqs_rx_cfg_global.rx_freq);


iqs_rx_cfg_global.rx_type=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_type,MIN_RX_TYPE,MAX_RX_TYPE,DEFAULT_RX_TYPE);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_TYPE,(uint8_t*)&iqs_rx_cfg_global.rx_type);

    iqs_rx_cfg_global.rx_rate=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_rate,MIN_RX_RATE,MAX_RX_RATE,DEFAULT_RX_RATE);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_RATE,(uint8_t*)&iqs_rx_cfg_global.rx_rate);

    //nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_ROLLOFF,(uint8_t*)&iqs_rx_cfg_global.rx_rolloff);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_AFC,(uint8_t*)&iqs_rx_cfg_global.rx_gain);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_RS,(uint8_t*)&iqs_rx_cfg_global.rx_rs);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_CC,(uint8_t*)&iqs_rx_cfg_global.rx_cc);
   
    iqs_rx_cfg_global.rx_rand=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_rand,MIN_RX_RAND,MAX_RX_RAND,DEFAULT_RX_RAND);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_RAND,(uint8_t*)&iqs_rx_cfg_global.rx_rand);
   
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_CRC,(uint8_t*)&iqs_rx_cfg_global.rx_crc);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_SIZE,(uint8_t*)&iqs_rx_cfg_global.rx_size);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_ID,(uint8_t*)&iqs_rx_cfg_global.rx_id);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_RSVD1,(uint8_t*)&iqs_rx_cfg_global.rx_rsvd1);
    
  iqs_rx_cfg_global.rx_frames=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_frames,MIN_RX_FRAMES,MAX_RX_FRAMES,DEFAULT_RX_FRAMES);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_FRAMES,(uint8_t*)&iqs_rx_cfg_global.rx_frames);

    iqs_rx_cfg_global.rx_detected=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_detected,MIN_RX_DETECTED,MAX_RX_DETECTED,DEFAULT_RX_DETECTED);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_DETECTED,(uint8_t*)&iqs_rx_cfg_global.rx_detected);

    iqs_rx_cfg_global.rx_rssi=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_rssi,MIN_RX_RSSI,MAX_RX_RSSI,DEFAULT_RX_RSSI);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_RSSI,(uint8_t*)&iqs_rx_cfg_global.rx_rssi);

    iqs_rx_cfg_global.rx_freqerr=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_freqerr,MIN_RX_FREQERR,MAX_RX_FREQERR,DEFAULT_RX_FREQERR);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_FREQERR,(uint8_t*)&iqs_rx_cfg_global.rx_freqerr);

    iqs_rx_cfg_global.rx_symerr=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_symerr,MIN_RX_SYMERR,MAX_RX_SYMERR,DEFAULT_RX_SYMERR);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_SYMERR,(uint8_t*)&iqs_rx_cfg_global.rx_symerr);


    //nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_RSVD2,(uint8_t*)&iqs_rx_cfg_global.rx_rsvd2);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_RSVD3,(uint8_t*)&iqs_rx_cfg_global.rx_rsvd3);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_RSVD4,(uint8_t*)&iqs_rx_cfg_global.rx_rsvd4);
   
    iqs_tx_cfg_global.tx_freq=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_freq,MIN_TX_FREQ,MAX_TX_FREQ,DEFAULT_TX_FREQ);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_FREQ,(uint8_t*)&iqs_tx_cfg_global.tx_freq);

    iqs_tx_cfg_global.tx_type=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_type,MIN_TX_TYPE,MAX_TX_TYPE,DEFAULT_TX_TYPE);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_TYPE,(uint8_t*)&iqs_tx_cfg_global.tx_type);

    iqs_tx_cfg_global.tx_rate=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_rate,MIN_TX_RATE,MAX_TX_RATE,DEFAULT_TX_RATE);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_RATE,(uint8_t*)&iqs_tx_cfg_global.tx_rate);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_ROLLOFF,(uint8_t*)&iqs_tx_cfg_global.tx_rolloff);
    
    iqs_tx_cfg_global.tx_pout=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_pout,MIN_TX_POUT,MAX_TX_POUT,DEFAULT_TX_POUT);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_POUT,(uint8_t*)&iqs_tx_cfg_global.tx_pout);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_ALC,(uint8_t*)&iqs_tx_cfg_global.tx_alc);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_RS,(uint8_t*)&iqs_tx_cfg_global.tx_rs);
    
    iqs_tx_cfg_global.tx_cc=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_cc,MIN_TX_CC,MAX_TX_CC,DEFAULT_TX_CC);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_CC,(uint8_t*)&iqs_tx_cfg_global.tx_cc);

   iqs_tx_cfg_global.tx_rand=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_rand,MIN_TX_RAND,MAX_TX_RAND,DEFAULT_TX_RAND);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_RAND,(uint8_t*)&iqs_tx_cfg_global.tx_rand);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_CRC,(uint8_t*)&iqs_tx_cfg_global.tx_crc);
    
    iqs_tx_cfg_global.tx_idletime=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_idletime,MIN_TX_IDLETIME,MAX_TX_IDLETIME,DEFAULT_TX_IDLETIME);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_IDLETIME,(uint8_t*)&iqs_tx_cfg_global.tx_idletime);

   iqs_tx_cfg_global.tx_size=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_size,MIN_TX_SIZE,MAX_TX_SIZE,DEFAULT_TX_SIZE);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_SIZE,(uint8_t*)&iqs_tx_cfg_global.tx_size);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_ID,(uint8_t*)&iqs_tx_cfg_global.tx_id);
    //nvm_parameter_write(NVM_DATA,NVM_SBAND_TMP_LIMIT,(uint8_t*)&iqs_tx_cfg_global.tx_tmp_limit);
    
    iqs_tx_cfg_global.tx_frames=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_frames,MIN_TX_FRAMES,MAX_TX_FRAMES,DEFAULT_TX_FRAMES);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_FRAMES,(uint8_t*)&iqs_tx_cfg_global.tx_frames);


iqs_net_prop_glob.ip_stack_enb=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.ip_stack_enb,MIN_IP_STACK_ENB,MAX_IP_STACK_ENB,DEFAULT_IP_STACK_ENB);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_IP_STAK_ENABLE,(uint8_t*)&iqs_net_prop_glob.ip_stack_enb);

//++iqs_net_prop_glob.dev_ip=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.dev_ip,MIN_DEV_IP,MAX_DEV_IP,DEFAULT_DEV_IP);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_IQS_DEV_IP,(uint8_t*)&iqs_net_prop_glob.dev_ip);

//iqs_net_prop_glob.dev_port=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.dev_port,MIN_DEV_PORT,MAX_DEV_PORT,DEFAULT_DEV_PORT);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_IQS_DEV_PORT,(uint8_t*)&iqs_net_prop_glob.dev_port);

//iqs_net_prop_glob.eth_prefix=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.eth_prefix,MIN_ETH_PREFIX,MAX_ETH_PREFIX,DEFAULT_ETH_PREFIX);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_ETH_PREFIX_RSVD,(uint8_t*)&iqs_net_prop_glob.eth_prefix);

//iqs_net_prop_glob.dev_ip_temp=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.dev_ip_temp,MIN_DEV_IP_TEMP,MAX_DEV_IP_TEMP,DEFAULT_DEV_IP_TEMP);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_IQS_DEV_IP_TEMP,(uint8_t*)&iqs_net_prop_glob.dev_ip_temp);

//iqs_net_prop_glob.dev_port_udp=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.dev_port_udp,MIN_DEV_PORT_UDP,MAX_DEV_PORT_UDP,DEFAULT_DEV_PORT_UDP);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_IQS_DEV_PORT_UDP,(uint8_t*)&iqs_net_prop_glob.dev_port_udp);

//iqs_net_prop_glob.dev_ip_udp=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.dev_ip_udp,MIN_DEV_IP_UDP,MAX_DEV_IP_UDP,DEFAULT_DEV_IP_UDP);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_IQS_DEV_IP_UDP,(uint8_t*)&iqs_net_prop_glob.dev_ip_udp);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_NET_PREFIX_RSVD,(uint8_t*)&iqs_net_prop_glob.eth_prefix);
// iqs_prod_key_glob.leop_prod_key=RANGE_CHECK_AND_ASSIGN(iqs_prod_key_glob.leop_prod_key,MIN_LEOP_PROD_KEY,MAX_LEOP_PROD_KEY,DEFAULT_LEOP_PROD_KEY);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_LEOPS_PRD_KEY,(uint8_t*)&iqs_prod_key_glob.leop_prod_key);


//  iqs_prod_key_glob.con_prod_key=RANGE_CHECK_AND_ASSIGN(iqs_prod_key_glob.con_prod_key,MIN_CON_PROD_KEY,MAX_CON_PROD_KEY,DEFAULT_CON_PROD_KEY);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_CONOPS_PRD_KEY,(uint8_t*)&iqs_prod_key_glob.con_prod_key);

    iqs_tx_rx_atten_glob.rx_gain=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.rx_gain,MIN_RX_GAIN,MAX_RX_GAIN,DEFAULT_RX_GAIN);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_GAIN,(uint8_t*)&iqs_tx_rx_atten_glob.rx_gain);

iqs_tx_rx_atten_glob.idx_gain=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.idx_gain,MIN_IDX_GAIN,MAX_IDX_GAIN,DEFAULT_IDX_GAIN);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_IDX_GAIN,(uint8_t*)&iqs_tx_rx_atten_glob.idx_gain);

iqs_tx_rx_atten_glob.pwr_min=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.pwr_min,MIN_PWR_MIN,MAX_PWR_MIN,DEFAULT_PWR_MIN);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_PWR_MIN,(uint8_t*)&iqs_tx_rx_atten_glob.pwr_min);

iqs_tx_rx_atten_glob.pwr_max=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.pwr_max,MIN_PWR_MAX,MAX_PWR_MAX,DEFAULT_PWR_MAX);
nvm_parameter_write(NVM_DATA,NVM_SBAND_PWR_MAX,(uint8_t*)&iqs_tx_rx_atten_glob.pwr_max);

iqs_tx_rx_atten_glob.rx_ch_no=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.rx_ch_no,MIN_RX_CH_NO,MAX_RX_CH_NO,DEFAULT_RX_CH_NO);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_RX_CHAN_NUM,(uint8_t*)&iqs_tx_rx_atten_glob.rx_ch_no);

iqs_tx_rx_atten_glob.mtu_size=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.mtu_size,MIN_MTU_SIZE,MAX_MTU_SIZE,DEFAULT_MTU_SIZE);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_MTU_SIZE,(uint8_t*)&iqs_tx_rx_atten_glob.mtu_size);

//iqs_tx_rx_atten_glob.pwr_attn_lut=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.pwr_attn_lut,MIN_PWR_ATTN_LUT,MAX_PWR_ATTN_LUT,DEFAULT_PWR_ATTN_LUT);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_PWR_ATTN_LUT,(uint8_t*)&iqs_tx_rx_atten_glob.pwr_attn_lut);

iqs_tx_rx_atten_glob.tx_attn_gain=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.tx_attn_gain,MIN_TX_ATTN_GAIN,MAX_TX_ATTN_GAIN,DEFAULT_TX_ATTN_GAIN);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_ATTN_GAIN,(uint8_t*)&iqs_tx_rx_atten_glob.tx_attn_gain);

//++iqs_fw_ver_glob.fpga_ver=RANGE_CHECK_AND_ASSIGN(iqs_fw_ver_glob.fpga_ver,MIN_FPGA_VER,MAX_FPGA_VER,DEFAULT_FPGA_VER);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_FPGA_VER,(uint8_t*)&iqs_fw_ver_glob.fpga_ver);

//++iqs_fw_ver_glob.swap_ver=RANGE_CHECK_AND_ASSIGN(iqs_fw_ver_glob.swap_ver,MIN_SWAP_VER,MAX_SWAP_VER,DEFAULT_SWAP_VER);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_SWAP_VER,(uint8_t*)&iqs_fw_ver_glob.swap_ver);

//++iqs_fw_ver_glob.cpu_ver=RANGE_CHECK_AND_ASSIGN(iqs_fw_ver_glob.cpu_ver,MIN_CPU_VER,MAX_CPU_VER,DEFAULT_CPU_VER);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_CPU_VER,(uint8_t*)&iqs_fw_ver_glob.cpu_ver);

iqs_tim_out_glob.beacon_tx_timeout=RANGE_CHECK_AND_ASSIGN(iqs_tim_out_glob.beacon_tx_timeout,MIN_BEACON_TX_TIMEOUT,MAX_BEACON_TX_TIMEOUT,DEFAULT_BEACON_TX_TIMEOUT);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_BEACON_TX_TIMEOUT,(uint8_t*)&iqs_tim_out_glob.beacon_tx_timeout);

iqs_tim_out_glob.tx_win_timeout=RANGE_CHECK_AND_ASSIGN(iqs_tim_out_glob.tx_win_timeout,MIN_TX_WIN_TIMEOUT,MAX_TX_WIN_TIMEOUT,DEFAULT_TX_WIN_TIMEOUT);
    nvm_parameter_write(NVM_DATA,NVM_SBAND_TX_WIN_TIMEOUT,(uint8_t*)&iqs_tim_out_glob.tx_win_timeout);    
}

/**
 *@Brief: This function is used to read S-Band Xlink configuration to NVM location
 *
 * @brief Read S-band crosslinks configuration from NVM.
 * 
 * This function reads the saved S-band crosslinks configuration
 * from NVM storage.
 */
void comms_sband_xlinks_cfg_nvm_read(void)
{
    uint8_t status = 0;

    nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_FREQ,(uint8_t*)&iqs_rx_cfg_global.rx_freq);
    iqs_rx_cfg_global.rx_freq=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_freq,MIN_RX_FREQ,MAX_RX_FREQ,DEFAULT_RX_FREQ);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_TYPE,(uint8_t*)&iqs_rx_cfg_global.rx_type);
iqs_rx_cfg_global.rx_type=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_type,MIN_RX_TYPE,MAX_RX_TYPE,DEFAULT_RX_TYPE);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_RATE,(uint8_t*)&iqs_rx_cfg_global.rx_rate);
    iqs_rx_cfg_global.rx_rate=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_rate,MIN_RX_RATE,MAX_RX_RATE,DEFAULT_RX_RATE);

    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_ROLLOFF,(uint8_t*)&iqs_rx_cfg_global.rx_rolloff);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_AFC,(uint8_t*)&iqs_rx_cfg_global.rx_gain);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_RS,(uint8_t*)&iqs_rx_cfg_global.rx_rs);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_CC,(uint8_t*)&iqs_rx_cfg_global.rx_cc);
    
    nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_RAND,(uint8_t*)&iqs_rx_cfg_global.rx_rand);
    iqs_rx_cfg_global.rx_rand=RANGE_CHECK_AND_ASSIGN(iqs_rx_cfg_global.rx_rand,MIN_RX_RAND,MAX_RX_RAND,DEFAULT_RX_RAND);
    
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_CRC,(uint8_t*)&iqs_rx_cfg_global.rx_crc);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_SIZE,(uint8_t*)&iqs_rx_cfg_global.rx_size);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_ID,(uint8_t*)&iqs_rx_cfg_global.rx_id);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_RSVD1,(uint8_t*)&iqs_rx_cfg_global.rx_rsvd1);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_FRAMES,(uint8_t*)&iqs_rx_cfg_global.rx_frames);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_DETECTED,(uint8_t*)&iqs_rx_cfg_global.rx_detected);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_RSSI,(uint8_t*)&iqs_rx_cfg_global.rx_rssi);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_FREQERR,(uint8_t*)&iqs_rx_cfg_global.rx_freqerr);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_SYMERR,(uint8_t*)&iqs_rx_cfg_global.rx_symerr);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_RSVD2,(uint8_t*)&iqs_rx_cfg_global.rx_rsvd2);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_TYPE,(uint8_t*)&iqs_tx_cfg_global.tx_type);
    iqs_tx_cfg_global.tx_type=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_type,MIN_TX_TYPE,MAX_TX_TYPE,DEFAULT_TX_TYPE);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_RATE,(uint8_t*)&iqs_tx_cfg_global.tx_rate);
iqs_tx_cfg_global.tx_rate=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_rate,MIN_TX_RATE,MAX_TX_RATE,DEFAULT_TX_RATE);
  
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_POUT,(uint8_t*)&iqs_tx_cfg_global.tx_pout);
iqs_tx_cfg_global.tx_pout=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_pout,MIN_TX_POUT,MAX_TX_POUT,DEFAULT_TX_POUT);

    //nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_ALC,(uint8_t*)&iqs_tx_cfg_global.tx_alc);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_RS,(uint8_t*)&iqs_tx_cfg_global.tx_rs);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_CC,(uint8_t*)&iqs_tx_cfg_global.tx_cc);
iqs_tx_cfg_global.tx_cc=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_cc,MIN_TX_CC,MAX_TX_CC,DEFAULT_TX_CC);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_RAND,(uint8_t*)&iqs_tx_cfg_global.tx_rand);
iqs_tx_cfg_global.tx_rand=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_rand,MIN_TX_RAND,MAX_TX_RAND,DEFAULT_TX_RAND);

    //nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_CRC,(uint8_t*)&iqs_tx_cfg_global.tx_crc);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_IDLETIME,(uint8_t*)&iqs_tx_cfg_global.tx_idletime);
iqs_tx_cfg_global.tx_idletime=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_idletime,MIN_TX_CC,MAX_TX_IDLETIME,DEFAULT_TX_IDLETIME);


    nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_SIZE,(uint8_t*)&iqs_tx_cfg_global.tx_size);
iqs_tx_cfg_global.tx_size=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_size,MIN_TX_SIZE,MAX_TX_SIZE,DEFAULT_TX_SIZE);
    
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_ID,(uint8_t*)&iqs_tx_cfg_global.tx_id);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_TMP_LIMIT,(uint8_t*)&iqs_tx_cfg_global.tx_tmp_limit);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_FRAMES,(uint8_t*)&iqs_tx_cfg_global.tx_frames);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_IP_STAK_ENABLE,(uint8_t*)&iqs_net_prop_glob.ip_stack_enb);
iqs_net_prop_glob.ip_stack_enb=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.ip_stack_enb,MIN_IP_STACK_ENB,MAX_IP_STACK_ENB,DEFAULT_IP_STACK_ENB);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_IQS_DEV_IP,(uint8_t*)&iqs_net_prop_glob.dev_ip);
//++++iqs_net_prop_glob.dev_ip=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.dev_ip,MIN_DEV_IP,MAX_DEV_IP,DEFAULT_DEV_IP);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_IQS_DEV_PORT,(uint8_t*)&iqs_net_prop_glob.dev_port);
//iqs_net_prop_glob.dev_port=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.dev_port,MIN_DEV_PORT,MAX_DEV_PORT,DEFAULT_DEV_PORT);
    

    nvm_parameter_read(NVM_DATA,NVM_SBAND_ETH_PREFIX_RSVD,(uint8_t*)&iqs_net_prop_glob.eth_prefix);
//iqs_net_prop_glob.eth_prefix=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.eth_prefix,MIN_ETH_PREFIX,MAX_ETH_PREFIX,DEFAULT_ETH_PREFIX);
  
    nvm_parameter_read(NVM_DATA,NVM_SBAND_IQS_DEV_PORT_UDP,(uint8_t*)&iqs_net_prop_glob.dev_port_udp);
//iqs_net_prop_glob.dev_port_udp=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.dev_port_udp,MIN_DEV_PORT_UDP,MAX_DEV_PORT_UDP,DEFAULT_DEV_PORT_UDP);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_NET_PREFIX_RSVD,(uint8_t*)&iqs_net_prop_glob.eth_prefix);
//iqs_net_prop_glob.eth_prefix=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.eth_prefix,MIN_ETH_PREFIX,MAX_ETH_PREFIX,DEFAULT_ETH_PREFIX);


    nvm_parameter_read(NVM_DATA,NVM_SBAND_CONOPS_PRD_KEY,(uint8_t*)&iqs_prod_key_glob.con_prod_key);
//++iqs_prod_key_glob.con_prod_key=RANGE_CHECK_AND_ASSIGN(iqs_prod_key_glob.con_prod_key,MIN_CON_PROD_KEY,MAX_CON_PROD_KEY,DEFAULT_CON_PROD_KEY);


    nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_GAIN,(uint8_t*)&iqs_tx_rx_atten_glob.rx_gain);
iqs_tx_rx_atten_glob.rx_gain=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.rx_gain,MIN_RX_GAIN,MAX_RX_GAIN,DEFAULT_RX_GAIN);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_IDX_GAIN,(uint8_t*)&iqs_tx_rx_atten_glob.idx_gain);
iqs_tx_rx_atten_glob.idx_gain=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.idx_gain,MIN_IDX_GAIN,MAX_IDX_GAIN,DEFAULT_IDX_GAIN);


    nvm_parameter_read(NVM_DATA,NVM_SBAND_PWR_MIN,(uint8_t*)&iqs_tx_rx_atten_glob.pwr_min);
iqs_tx_rx_atten_glob.pwr_min=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.pwr_min,MIN_PWR_MIN,MAX_PWR_MIN,DEFAULT_PWR_MIN);


    nvm_parameter_read(NVM_DATA,NVM_SBAND_PWR_MAX,(uint8_t*)&iqs_tx_rx_atten_glob.pwr_max);
iqs_tx_rx_atten_glob.pwr_max=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.pwr_max,MIN_PWR_MAX,MAX_PWR_MAX,DEFAULT_PWR_MAX);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_CHAN_NUM,(uint8_t*)&iqs_tx_rx_atten_glob.rx_ch_no);
iqs_tx_rx_atten_glob.rx_ch_no=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.rx_ch_no,MIN_RX_CH_NO,MAX_RX_CH_NO,DEFAULT_RX_CH_NO);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_MTU_SIZE,(uint8_t*)&iqs_tx_rx_atten_glob.mtu_size);
iqs_tx_rx_atten_glob.mtu_size=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.mtu_size,MIN_MTU_SIZE,MAX_MTU_SIZE,DEFAULT_MTU_SIZE);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_PWR_ATTN_LUT,(uint8_t*)&iqs_tx_rx_atten_glob.pwr_attn_lut);
//iqs_tx_rx_atten_glob.pwr_attn_lut=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.pwr_attn_lut,MIN_PWR_ATTN_LUT,MAX_PWR_ATTN_LUT,DEFAULT_PWR_ATTN_LUT);


    nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_ATTN_GAIN,(uint8_t*)&iqs_tx_rx_atten_glob.tx_attn_gain);
iqs_tx_rx_atten_glob.tx_attn_gain=RANGE_CHECK_AND_ASSIGN(iqs_tx_rx_atten_glob.tx_attn_gain,MIN_TX_ATTN_GAIN,MAX_TX_ATTN_GAIN,DEFAULT_TX_ATTN_GAIN);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_FPGA_VER,(uint8_t*)&iqs_fw_ver_glob.fpga_ver);
//++iqs_fw_ver_glob.fpga_ver=RANGE_CHECK_AND_ASSIGN(iqs_fw_ver_glob.fpga_ver,MIN_FPGA_VER,MAX_FPGA_VER,DEFAULT_FPGA_VER);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_SWAP_VER,(uint8_t*)&iqs_fw_ver_glob.swap_ver);
  //++  iqs_fw_ver_glob.swap_ver=RANGE_CHECK_AND_ASSIGN(iqs_fw_ver_glob.swap_ver,MIN_SWAP_VER,MAX_SWAP_VER,DEFAULT_SWAP_VER);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_CPU_VER,(uint8_t*)&iqs_fw_ver_glob.cpu_ver);
//++iqs_fw_ver_glob.cpu_ver=RANGE_CHECK_AND_ASSIGN(iqs_fw_ver_glob.cpu_ver,MIN_CPU_VER,MAX_CPU_VER,DEFAULT_CPU_VER);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_BEACON_TX_TIMEOUT,(uint8_t*)&iqs_tim_out_glob.beacon_tx_timeout);
iqs_tim_out_glob.beacon_tx_timeout=RANGE_CHECK_AND_ASSIGN(iqs_tim_out_glob.beacon_tx_timeout,MIN_BEACON_TX_TIMEOUT,MAX_BEACON_TX_TIMEOUT,DEFAULT_BEACON_TX_TIMEOUT);


    nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_WIN_TIMEOUT,(uint8_t*)&iqs_tim_out_glob.tx_win_timeout);
iqs_tim_out_glob.tx_win_timeout=RANGE_CHECK_AND_ASSIGN(iqs_tim_out_glob.tx_win_timeout,MIN_TX_WIN_TIMEOUT,MAX_TX_WIN_TIMEOUT,DEFAULT_TX_WIN_TIMEOUT);

    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_RSVD3,(uint8_t*)&iqs_rx_cfg_global.rx_rsvd3);
    //nvm_parameter_read(NVM_DATA,NVM_SBAND_RX_RSVD4,(uint8_t*)&iqs_rx_cfg_global.rx_rsvd4);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TX_FREQ,(uint8_t*)&iqs_tx_cfg_global.tx_freq);
iqs_tx_cfg_global.tx_freq=RANGE_CHECK_AND_ASSIGN(iqs_tx_cfg_global.tx_freq,MIN_TX_FREQ,MAX_TX_FREQ,DEFAULT_TX_FREQ);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_LEOPS_PRD_KEY,(uint8_t*)&iqs_prod_key_glob.leop_prod_key);
//++iqs_prod_key_glob.leop_prod_key=RANGE_CHECK_AND_ASSIGN(iqs_prod_key_glob.leop_prod_key,MIN_LEOP_PROD_KEY,MAX_LEOP_PROD_KEY,DEFAULT_LEOP_PROD_KEY);

    nvm_parameter_read(NVM_DATA,NVM_SBAND_IQS_DEV_IP_TEMP,(uint8_t*)&iqs_net_prop_glob.dev_ip_temp);
//++iqs_net_prop_glob.dev_ip_temp=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.dev_ip_temp,MIN_DEV_IP_TEMP,MAX_DEV_IP_TEMP,DEFAULT_DEV_IP_TEMP);


    nvm_parameter_read(NVM_DATA,NVM_SBAND_IQS_DEV_IP_UDP,(uint8_t*)&iqs_net_prop_glob.dev_ip_udp);
//+++iqs_net_prop_glob.dev_ip_udp=RANGE_CHECK_AND_ASSIGN(iqs_net_prop_glob.dev_ip_udp,MIN_DEV_IP_UDP,MAX_DEV_IP_UDP,DEFAULT_DEV_IP_UDP);


    iqs_tx_cfg_global.tx_pout = 33;

#ifdef LINUX_TEMP_PORT
    DEBUG_CPRINT(("\nNVM_SBAND_RX_FREQ:%d\n",iqs_rx_cfg_global.rx_freq));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_TYPE:%d\n",iqs_rx_cfg_global.rx_type));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_RATE:%d\n",iqs_rx_cfg_global.rx_rate));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_ROLLOFF:%d\n",iqs_rx_cfg_global.rx_rolloff));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_AFC:%d\n",iqs_rx_cfg_global.rx_gain));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_RS:%d\n",iqs_rx_cfg_global.rx_rs));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_CC:%d\n",iqs_rx_cfg_global.rx_cc));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_RAND:%d\n",iqs_rx_cfg_global.rx_rand));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_CRC:%d\n",iqs_rx_cfg_global.rx_crc));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_SIZE:%d\n",iqs_rx_cfg_global.rx_size));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_ID:%d\n",iqs_rx_cfg_global.rx_id));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_RSVD1:%d\n",iqs_rx_cfg_global.rx_rsvd1));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_FRAMES:%d\n",iqs_rx_cfg_global.rx_frames));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_DETECTED:%d\n",iqs_rx_cfg_global.rx_detected));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_RSSI:%d\n",iqs_rx_cfg_global.rx_rssi));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_FREQERR:%d\n",iqs_rx_cfg_global.rx_freqerr));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_SYMERR:%d\n",iqs_rx_cfg_global.rx_symerr));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_FREQ:%d\n",iqs_tx_cfg_global.tx_freq));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_TYPE:%d\n",iqs_tx_cfg_global.tx_type));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_RATE:%d\n",iqs_tx_cfg_global.tx_rate));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_ROLLOFF:%d\n",iqs_tx_cfg_global.tx_rolloff));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_POUT:%d\n",(uint32_t)iqs_tx_cfg_global.tx_pout));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_ALC:%d\n",iqs_tx_cfg_global.tx_alc));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_RS:%d\n",iqs_tx_cfg_global.tx_rs));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_CC:%d\n",iqs_tx_cfg_global.tx_cc));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_RAND:%d\n",iqs_tx_cfg_global.tx_rand));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_CRC:%d\n",iqs_tx_cfg_global.tx_crc));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_IDLETIME:%d\n",iqs_tx_cfg_global.tx_idletime));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_SIZE:%d\n",iqs_tx_cfg_global.tx_size));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_ID:%d\n",iqs_tx_cfg_global.tx_id));
    DEBUG_CPRINT(("\nNVM_SBAND_TMP_LIMIT:%d\n",iqs_tx_cfg_global.tx_tmp_limit));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_FRAMES:%d\n",iqs_tx_cfg_global.tx_frames));
    DEBUG_CPRINT(("\nNVM_SBAND_IP_STAK_ENABLE:%d\n",iqs_net_prop_glob.ip_stack_enb));
    DEBUG_CPRINT(("\nNVM_SBAND_IQS_DEV_IP:%s\n",iqs_net_prop_glob.dev_ip));
    DEBUG_CPRINT(("\nNVM_SBAND_IQS_DEV_PORT:%d\n",iqs_net_prop_glob.dev_port));
    DEBUG_CPRINT(("\nNVM_SBAND_IQS_DEV_IP_TEMP:%s\n",iqs_net_prop_glob.dev_ip_temp));
    DEBUG_CPRINT(("\nNVM_SBAND_IQS_DEV_IP_UDP:%s\n",iqs_net_prop_glob.dev_ip_udp));
    DEBUG_CPRINT(("\nNVM_SBAND_IQS_DEV_PORT_UDP:%d\n",iqs_net_prop_glob.dev_port_udp));
    DEBUG_CPRINT(("\nNVM_SBAND_LEOPS_PRD_KEY:%s\n",iqs_prod_key_glob.leop_prod_key));
    DEBUG_CPRINT(("\nNVM_SBAND_CONOPS_PRD_KEY:%s\n",iqs_prod_key_glob.con_prod_key));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_GAIN:%d\n",iqs_tx_rx_atten_glob.rx_gain));
    DEBUG_CPRINT(("\nNVM_SBAND_IDX_GAIN:%d\n",iqs_tx_rx_atten_glob.idx_gain));
    DEBUG_CPRINT(("\nNVM_SBAND_PWR_MIN:%d\n",iqs_tx_rx_atten_glob.pwr_min));
    DEBUG_CPRINT(("\nNVM_SBAND_PWR_MAX:%d\n",iqs_tx_rx_atten_glob.pwr_max));
    DEBUG_CPRINT(("\nNVM_SBAND_RX_CHAN_NUM:%d\n",iqs_tx_rx_atten_glob.rx_ch_no));
    DEBUG_CPRINT(("\nNVM_SBAND_MTU_SIZE:%d\n",iqs_tx_rx_atten_glob.mtu_size));
    DEBUG_CPRINT(("\nNVM_SBAND_PWR_ATTN_LUT:%d\n",iqs_tx_rx_atten_glob.pwr_attn_lut));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_ATTN_GAIN:%d\n",iqs_tx_rx_atten_glob.tx_attn_gain));
    DEBUG_CPRINT(("\nNVM_SBAND_FPGA_VER:%s\n",iqs_fw_ver_glob.fpga_ver));
    DEBUG_CPRINT(("\nNVM_SBAND_SWAP_VER:%s\n",iqs_fw_ver_glob.swap_ver));
    DEBUG_CPRINT(("\nNVM_SBAND_CPU_VER:%s\n",iqs_fw_ver_glob.cpu_ver));
    DEBUG_CPRINT(("\nNVM_SBAND_BEACON_TX_TIMEOUT:%d\n",iqs_tim_out_glob.beacon_tx_timeout));
    DEBUG_CPRINT(("\nNVM_SBAND_TX_WIN_TIMEOUT:%d\n",iqs_tim_out_glob.tx_win_timeout));
#endif

#if 0
    sband_proc_tc(SERVICE_GET | SERVICE_DEVICE_CONF);

    status = comms_sband_xlink_tx_cfg();

    status = comms_sband_xlink_rx_cfg();

    sband_proc_tc_pld((SERVICE_SET|SERVICE_DEVICE_CONF), (uint8_t*)&sband_serv_device_conf);
    os_delay(100);

    sband_serv_start_rf_rcv.ip_address = xlink_get_udp_ip_addr();
    sband_serv_start_rf_rcv.port                   = 51004;			
    sband_serv_start_rf_rcv.send_format            = RF_RCV_SEND_CLTU;		
    sband_serv_start_rf_rcv.output_interface       = RF_RCV_OUTPUT_UDP;
    sband_serv_start_rf_rcv.Reserve                = 0;

    DEBUG_CPRINT(("\nTemp IP Address: %d\n",sband_serv_start_rf_rcv.ip_address));

    sband_proc_tc_pld((SERVICE_SET|SERVICE_START_RF_RCV), (uint8_t*)&sband_serv_start_rf_rcv);
    os_delay(100);

    uint32_t udp_temp_ip_addr = xlink_get_udp_temp_ip_addr(iqs_net_prop_glob.dev_ip_temp);

    sband_proc_tc_pld((SERVICE_SET | SERVICE_IP_ADR),(uint8_t *)&udp_temp_ip_addr);
    os_delay(100);
#endif
    DEBUG_CPRINT(("[SBAND] NVM Read TX configuration status: %d",status));
    log_id_with_one_arg(LOG_INFO_L1,LOG_COMMS,NVM_READ_TX_CONFIURATION_STATUS__s8_,status);

    DEBUG_CPRINT(("[SBAND] NVM Read RX configuration status: %d",status));
    log_id_with_one_arg(LOG_INFO_L1,LOG_COMMS,NVM_READ_RX_CONFIURATION_STATUS__s8_,status);

}

/**
 * @brief This function is used to read S-Band configuration from NVM location
 *
 * @brief Read S-band configuration from NVM.
 *
 * This function reads the saved S-band configuration
 * from NVM storage. 
 */
void comms_sband_cfg_nvm_read(void)
{
    int8 status = 0;
    status = status;
    nvm_parameter_read(NVM_DATA,NVM_SBAND_NAME,(uint8_t*)&sys_cfg_global.sys_name);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_BOOT_COUNT,(uint8_t*)&sys_cfg_global.boot_cfg.sys_bootcount);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_GWDT_INIT,(uint8_t*)&sys_cfg_global.gwdt_cfg.sys_gwdt_init);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_CSP_ADDRESS,(uint8_t*)&sys_cfg_global.csp_cfg.sys_csp_address);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_CAN_RATE,(uint8_t*)&sys_cfg_global.can_cfg.sys_can_rate);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_CAN_PROMISC,(uint8_t*)&sys_cfg_global.can_cfg.sys_can_promisc);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_UART_RATE,(uint8_t*)&sys_cfg_global.uart_cfg.sys_uart_rate);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_UART_MULTIDROP,(uint8_t*)&sys_cfg_global.uart_cfg.sys_uart_multidrop);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_IP_STACK_ENABLE,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_enable);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_ETH_IP_ADDRESS,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_en_ip);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_ETH_NET_PREFIX_BIT,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_en_prefix);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_ETH_GATEWAY_IP_ADDRESS,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_en_gw);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_SPACELINK_IP_ADDRESS,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_rf_ip);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_SPACELINK_NET_PREFIX_BIT,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_rf_prefix);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_SPACELINK_GATEWAY_IP_ADDRESS,(uint8_t*)&sys_cfg_global.net_cfg.sys_net_rf_gw);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_PWR_SNS_GAIN,(uint8_t*)&cal_cfg_global.cal_ps_gain);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_PWR_SNS_INTERCEPT,(uint8_t*)&cal_cfg_global.cal_ps_intercept);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_VCTCXO,(uint8_t*)&cal_cfg_global.cal_vctcxo);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TRANS_FREQ,(uint8_t*)&tx_cfg_global.tx_cfg_freq);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TRANS_MOD_TYP,(uint8_t*)&tx_cfg_global.tx_cfg_type);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TRANS_SYMB_RATE,(uint8_t*)&tx_cfg_global.tx_cfg_rate);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TRANS_ROLL_OFF,(uint8_t*)&tx_cfg_global.tx_cfg_rolloff);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TRANS_PWR,(uint8_t*)&tx_cfg_global.tx_cfg_pout);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_ALC_MODE,(uint8_t*)&tx_cfg_global.tx_cfg_alc_mode);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TRANS_EN_REED_SOLOMON,(uint8_t*)&tx_cfg_global.tx_cfg_rs);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TRANS_EN_CONVOLUTIONAL,(uint8_t*)&tx_cfg_global.tx_cfg_cc);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TRANS_EN_RANDOMIZATION,(uint8_t*)&tx_cfg_global.tx_cfg_rand);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TRANS_EN_CRC_CHECKSUM,(uint8_t*)&tx_cfg_global.tx_cfg_crc);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_IDLE_TIME,(uint8_t*)&tx_cfg_global.tx_cfg_idletime);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_PAYLOAD_SIZE,(uint8_t*)&tx_cfg_global.tx_cfg_size);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_SATEELITE_ID,(uint8_t*)&tx_cfg_global.tx_cfg_id);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_ENCRYPT_KEY,(uint8_t*)&tx_cfg_global.crypto_cfg.crypto_key);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_ENCRYPT_FRAME,(uint8_t*)&tx_cfg_global.crypto_cfg.crypto_encrypt);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_TRANS_CRYPTO_AUTH,(uint8_t*)&tx_cfg_global.crypto_cfg.crypto_auth);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_PA_TEMP_LIMIT,(uint8_t*)&tx_cfg_global.tx_cfg_pa_templimit);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_RECEIVE_FREQ,(uint8_t*)&rx_cfg_global.rx_cfg_freq);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_MODULATION_TYP,(uint8_t*)&rx_cfg_global.rx_cfg_type);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_RECEIVE_SYMB_RATE,(uint8_t*)&rx_cfg_global.rx_cfg_rate);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_RECEIVE_ROLL_OFF,(uint8_t*)&rx_cfg_global.rx_cfg_rolloff);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_AFC_EN,(uint8_t*)&rx_cfg_global.afc_cfg.rx_cfg_afc_enable);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_AFC_RANGE,(uint8_t*)&rx_cfg_global.afc_cfg.rx_cfg_afc_range);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_RECEIVE_EN_REED_SOLOMON,(uint8_t*)&rx_cfg_global.rx_cfg_rs);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_RECEIVE_EN_CONVOLUTIONAL,(uint8_t*)&rx_cfg_global.rx_cfg_cc);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_RECEIVE_EN_RANDOMIZATION,(uint8_t*)&rx_cfg_global.rx_cfg_rand);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_RECEIVE_EN_CRC_CHECKSUM,(uint8_t*)&rx_cfg_global.rx_cfg_crc);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_RECEIVE_PAYLOAD_SIZE,(uint8_t*)&rx_cfg_global.rx_cfg_size);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_RECEIVE_SATELLITE_ID,(uint8_t*)&rx_cfg_global.rx_cfg_id);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_DECRYPT_KEY,(uint8_t*)&rx_cfg_global.crypto_cfg.crypto_key);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_DECRYPT_FRAME,(uint8_t*)&rx_cfg_global.crypto_cfg.crypto_decrypt);
    nvm_parameter_read(NVM_DATA,NVM_SBAND_RECIEVE_CRYPTO_AUTH,(uint8_t*)&rx_cfg_global.crypto_cfg.crypto_auth);

    strcpy((char*)&sys_cfg_global.csp_cfg.sys_csp_routes[0],"0/0 CAN,10/5 SPACE");

#if 0 /**TODO SRS4 enable*/

    status = SDR_SBAND_SET_SYS_CFG((&sys_cfg_global));
    DEBUG_CPRINT(("[SBAND] NVM Read SYS configuration status: %d",status));
    log_id_with_one_arg(LOG_INFO_L1,LOG_COMMS,NVM_READ_SYS_CONFIURATION_STATUS__s8_,status);

    status = SDR_SBAND_SET_RX_CFG((&rx_cfg_global));
    DEBUG_CPRINT(("[SBAND] NVM Read RX configuration status: %d",status));
    log_id_with_one_arg(LOG_INFO_L1,LOG_COMMS,NVM_READ_RX_CONFIURATION_STATUS__s8_,status);

    status = SDR_SBAND_SET_TX_CFG((&tx_cfg_global));
    DEBUG_CPRINT(("[SBAND] NVM Read TX configuration status: %d",status));
    log_id_with_one_arg(LOG_INFO_L1,LOG_COMMS,NVM_READ_TX_CONFIURATION_STATUS__s8_,status);
#endif

}

/**
 * @brief This function is used to update the first ground contact status to NVM location
 * 
 * @brief Update first ground contact in NVM.
 * 
 * This function updates the first ground contact timestamp
 * stored in NVM.
 */
void sband_nvm_upd_first_ground_contact(void)
{
    uint8_t gs = 1;
    nvm_parameter_write(NVM_DATA,NVM_SBAND_GS_FIRST_CONTACT,(uint8_t*)&gs);
}

/**
 * @brief This function is used to update the ground contact status after OTSU reset to NVM location
 * @brief Update Otsu ground contact in NVM.
 *
 * This function updates the Otsu ground station 
 * contact timestamp stored in NVM.
 */
void sband_nvm_upd_otsu_ground_contact(void)
{
    uint8_t gs = 1;
    nvm_parameter_write(NVM_DATA,NVM_SBAND_OTSU_FIRST_CONTACT,(uint8_t*)&gs);
}

/**
 * @brief This function is used to fetch the flight time of the satellite from NVM location
 * @brief Read permanent timer value from NVM.
 * 
 * @return Value of permanent timer stored in NVM.
 */
uint64_t sband_permanant_timer_read(void)
{
    uint64_t epoch_time =0;
    nvm_parameter_read(NVM_DATA,RTC_TIME_DATE_PERMANENT,(uint8_t*)&epoch_time);
    return epoch_time;
}
