#ifndef DRIVERS_BSP_JANUS2_STM32F7XX_PIN_MAP_H_
#define DRIVERS_BSP_JANUS2_STM32F7XX_PIN_MAP_H_


#include "exo_hal_io_al_common.h"
#include "exo_io_al_gpio_common.h"
#include "exo_ahw_al_gpio_exp_common.h"


#define RTC_CLOCK_SOURCE_LSE

#define RTC_ASYNCH_PREDIV  0x7F
#define RTC_SYNCH_PREDIV   0x00FF

#define I2C1_SDA		GPIO_PIN_9 //PB9
#define I2C1_SDA_PORT	GPIOB
#define I2C1_SCL		GPIO_PIN_8 //PB8
#define I2C1_SCL_PORT	GPIOB

#define I2C2_SDA		GPIO_PIN_5 //PH5
#define I2C2_SDA_PORT	GPIOH
#define I2C2_SCL		GPIO_PIN_4 //PH4
#define I2C2_SCL_PORT	GPIOH

#define I2C3_SDA		GPIO_PIN_9 //PC9
#define I2C3_SDA_PORT	GPIOC
#define I2C3_SCL		GPIO_PIN_7  //PH7
#define I2C3_SCL_PORT	GPIOH

#define I2C4_SDA		GPIO_PIN_7 //PB7
#define I2C4_SDA_PORT	GPIOB
#define I2C4_SCL		GPIO_PIN_6 //PB6
#define I2C4_SCL_PORT	GPIOB


#define UART5_TX		GPIO_PIN_12	//PC12
#define UART5_TX_PORT	GPIOC
#define UART5_RX		GPIO_PIN_2  //PD2
#define UART5_RX_PORT	GPIOD


#define UART4_TX		GPIO_PIN_10  //PC10
#define UART4_TX_PORT	GPIOC
#define UART4_RX		GPIO_PIN_11	 //PC11
#define UART4_RX_PORT	GPIOC


#define SPI1_CS		PA4
#define SPI1_MOSI	PD7
#define SPI1_MISO	PA6
#define SPI1_SCL	PA5
#define SPI1_RST	PJ4
#define SPI1_IRQ	PJ5
#define SPI1_PORT
#define SPI1_SCK_PORT

#define CAN2_TX		PB13
#define CAN2_RX		PB12
#define CAN2_PORT

/**QUADSPI GPIO Configuration */
#define QUADSPI_BK1_IO2  PF7
#define	QUADSPI_BK1_IO3  PF6
#define QUADSPI_CLK  	 PF10
#define QUADSPI_BK1_IO1  PF9
#define QUADSPI_BK1_IO0  PF8
#define QUADSPI_BK1_NCS  PB10


/* FMC pin mapping */
#define FMC_SDCLK  	 PG8
#define FMC_SDNE0  	 PH3
#define FMC_SDCKE0   PH2
#define FMC_SDNWE  	 PC0
#define FMC_SDNCAS   PG15
#define FMC_SDNRAS   PF11

#define FMC_NE1  	 PC7
#define FMC_NOE  	 PD4
#define FMC_NWE  	 PD5
#define FMC_NWAIT  	 PD6
#define FMC_NBL3  	 PI5

#define FMC_BA0  	 PG4
#define FMC_BA1  	 PG5

#define FMC_NBL0  	 PE0
#define FMC_NBL1  	 PE1
#define FMC_NBL2  	 PI4

#define FMC_A0  	 PF0
#define FMC_A1  	 PF1
#define FMC_A2  	 PF2
#define FMC_A3  	 PF3
#define FMC_A4  	 PF4
#define FMC_A5  	 PF5
#define FMC_A6  	 PF12
#define FMC_A7  	 PF13
#define FMC_A8  	 PF14
#define FMC_A9  	 PF15
#define FMC_A10 	 PG0
#define FMC_A11 	 PG1
#define FMC_A12 	 PG2
#define FMC_A13 	 PG3
#define FMC_A14 	 PG4
#define FMC_A15 	 PG5
#define FMC_A16 	 PD11
#define FMC_A17 	 PD12
#define FMC_A18 	 PD13
#define FMC_A19 	 PE3
#define FMC_A20 	 PE4
#define FMC_A21 	 PE5
#define FMC_A22 	 PE6

#define FMC_D0		 PD14
#define FMC_D1  	 PD15
#define FMC_D2  	 PD0
#define FMC_D3  	 PD1
#define FMC_D4  	 PE7
#define FMC_D5  	 PE8
#define FMC_D6  	 PE9
#define FMC_D7  	 PE10
#define FMC_D8  	 PE11
#define FMC_D9  	 PE12
#define FMC_D10 	 PE13
#define FMC_D11 	 PE14
#define FMC_D12 	 PE15
#define FMC_D13 	 PD8
#define FMC_D14 	 PD9
#define FMC_D15 	 PD10
#define FMC_D16 	 PH8
#define FMC_D17 	 PH9
#define FMC_D18 	 PH10
#define FMC_D19 	 PH11
#define FMC_D20 	 PH12
#define FMC_D21 	 PH13
#define FMC_D22 	 PH14
#define FMC_D23 	 PH15
#define FMC_D24 	 PI0
#define FMC_D25 	 PI1
#define FMC_D26 	 PI2
#define FMC_D27 	 PI3
#define FMC_D28 	 PI6
#define FMC_D29 	 PI7
#define FMC_D30 	 PI9
#define FMC_D31 	 PI10


#define MCU_GPIO(x) ((x <<8)  | MCU_ID)
#define MCP23008_EDGE_1_GPIO(x) ((x <<8)  | GPIO_EXPANDER_MCP23008_EDGE_1)
#define MCP23008_EDGE_2_GPIO(x) ((x <<8)  | GPIO_EXPANDER_MCP23008_EDGE_2)
#define MCP23008_OBC_1_GPIO(x) ((x <<8)  | GPIO_EXPANDER_MCP23008_OBC_1)
#define MCP23008_OBC_2_GPIO(x) ((x <<8)  | GPIO_EXPANDER_MCP23008_OBC_2)
#define MCP23008_GPS_GPIO(x) ((x <<8)  | GPIO_EXPANDER_MCP23008_GPS)
#define PCAL6408A_PS_GPIO(x) ((x <<8)  | GPIO_EXPANDER_PCAL6408A_PS)


//#define CORE_CURRENT_SENSE_INT  MCU_GPIO(IOAL_GPIO_PIN_0)
//#define PLD_SSD_EN   MCP23008_OBC_1_GPIO(GPIO_EXP_GPIO_6)

#define PS_CURRENT_SENSE_INT               MCU_GPIO(IOAL_GPIO_PIN_161)
#define PS_TEMP_SENSE_INT                  MCU_GPIO(IOAL_GPIO_PIN_163)
#define CORE_CURRENT_SENSE_INT             MCU_GPIO(IOAL_GPIO_PIN_137)
#define CORE_TEMP_SENSE_INT                MCU_GPIO(IOAL_GPIO_PIN_104)
#define CORE_IO2_EXPD_INT                  MCU_GPIO(IOAL_GPIO_PIN_144)
#define EDGE_IO_INT                        MCU_GPIO(IOAL_GPIO_PIN_164)
#define CORE_IO1_EXPD_INT                  MCU_GPIO(IOAL_GPIO_PIN_167)
#define GPS_IO_EXPD_INT                    MCU_GPIO(IOAL_GPIO_PIN_145)
#define SHUTDOWN_REQ                       MCU_GPIO(IOAL_GPIO_PIN_17)
#define POWER_EN                           MCU_GPIO(IOAL_GPIO_PIN_18)
#define SUS_S3_CORE                        MCU_GPIO(IOAL_GPIO_PIN_19)

#define SPI1_NSS                        	MCU_GPIO(IOAL_GPIO_PIN_5)
#define MCO        	                    	MCU_GPIO(IOAL_GPIO_PIN_9)
#define ETH_RESET_N                     	MCU_GPIO(IOAL_GPIO_PIN_166)
#define PS_SSD_HEAT_ENABLE                  MCU_GPIO(IOAL_GPIO_PIN_157) //157

#define SPI_RST                            MCU_GPIO(IOAL_GPIO_PIN_149)
#define SPI_UART_CONV_INTRPT               MCU_GPIO(IOAL_GPIO_PIN_150)

#define EPS_ALERT_INTR					    MCU_GPIO(IOAL_GPIO_PIN_119)

#define UART_SW_EN_1                       MCP23008_OBC_1_GPIO(GPIO_EXP_GPIO_0)
#define UART_SW_SEL_1                      MCP23008_OBC_1_GPIO(GPIO_EXP_GPIO_1)
#define UART_SW_EN_2                       MCP23008_OBC_1_GPIO(GPIO_EXP_GPIO_2)
#define UART_SW_SEL_2                      MCP23008_OBC_1_GPIO(GPIO_EXP_GPIO_3)
#define ETH_RESET                          MCP23008_OBC_1_GPIO(GPIO_EXP_GPIO_4)
#define GPS_CORE_PGOOD                     MCP23008_OBC_1_GPIO(GPIO_EXP_GPIO_5)
#define GPS_ON_CORE                        MCP23008_OBC_1_GPIO(GPIO_EXP_GPIO_6)
#define NRESET_IN                          MCP23008_OBC_1_GPIO(GPIO_EXP_GPIO_7)

#define ETH_DCDC1_ON                       MCP23008_OBC_2_GPIO(GPIO_EXP_GPIO_0)
#define ETH_DCDC2_ON                       MCP23008_OBC_2_GPIO(GPIO_EXP_GPIO_1)
#define OBC_DVDDL_PG                       MCP23008_OBC_2_GPIO(GPIO_EXP_GPIO_2)
#define OBC_DVDDIO_PG                      MCP23008_OBC_2_GPIO(GPIO_EXP_GPIO_3)
#define PAYLOAD_VCC_ENABLE                 MCP23008_OBC_2_GPIO(GPIO_EXP_GPIO_4)
#define PAYLOAD_SB_ENABLE                  MCP23008_OBC_2_GPIO(GPIO_EXP_GPIO_5)
#define PAYLOAD_SSD_CORE_ENABLE            MCP23008_OBC_2_GPIO(GPIO_EXP_GPIO_6)
#define SBAND_BB_EN                        MCP23008_OBC_2_GPIO(GPIO_EXP_GPIO_7)

#define PS_DVDDL_PG                        PCAL6408A_PS_GPIO(GPIO_EXP_GPIO_0)
#define PS_PCIE_EW3                        PCAL6408A_PS_GPIO(GPIO_EXP_GPIO_1)
#define PS_SSD_EN1                         PCAL6408A_PS_GPIO(GPIO_EXP_GPIO_2)
#define PS_SSD_EN2                         PCAL6408A_PS_GPIO(GPIO_EXP_GPIO_3)
#define PS_DVDDIO_PG                       PCAL6408A_PS_GPIO(GPIO_EXP_GPIO_4)
#define PS_ETH_DCDC2_ON                    PCAL6408A_PS_GPIO(GPIO_EXP_GPIO_5)
#define PS_ETH_RESET                       PCAL6408A_PS_GPIO(GPIO_EXP_GPIO_6)
#define PS_ETH_DCDC1_ON                    PCAL6408A_PS_GPIO(GPIO_EXP_GPIO_7)

#define EDGE_SSD_EN1                       MCP23008_EDGE_1_GPIO(GPIO_EXP_GPIO_0)
#define EDGE_SSD_EN2                       MCP23008_EDGE_1_GPIO(GPIO_EXP_GPIO_1)
#define EDGE_UART_SW_EN_1                  MCP23008_EDGE_1_GPIO(GPIO_EXP_GPIO_2)
#define EDGE_UART_SW_SEL_1                 MCP23008_EDGE_1_GPIO(GPIO_EXP_GPIO_3)
#define EDGE_SSD_HEAT_ENABLE               MCP23008_EDGE_1_GPIO(GPIO_EXP_GPIO_4)
#define EDGE_TEM_SEN_INT                   MCP23008_EDGE_1_GPIO(GPIO_EXP_GPIO_5)
#define EDGE_UART_SW_EN_2                  MCP23008_EDGE_1_GPIO(GPIO_EXP_GPIO_6)
#define EDGE_UART_SW_SEL_2                 MCP23008_EDGE_1_GPIO(GPIO_EXP_GPIO_7)

#define EDGE_EN_5V_EDGE                    MCP23008_EDGE_2_GPIO(GPIO_EXP_GPIO_0)
#define EDGE_IO2_EXPD_INT                  MCP23008_EDGE_2_GPIO(GPIO_EXP_GPIO_1)
#define EDGE_EN_1P8V_EDGE                  MCP23008_EDGE_2_GPIO(GPIO_EXP_GPIO_2)
#define EDGE_EN_3P3V_EDGE_EN               MCP23008_EDGE_2_GPIO(GPIO_EXP_GPIO_3)
#define EDGE_PGOOD_1P8V_EDGE               MCP23008_EDGE_2_GPIO(GPIO_EXP_GPIO_4)
#define EDGE_PGOOD_3P3V_EDGE               MCP23008_EDGE_2_GPIO(GPIO_EXP_GPIO_5)

#define GPS_TEM_SEN_INT                    MCP23008_GPS_GPIO(GPIO_EXP_GPIO_0)
#define GPS_HUB_ON                         MCP23008_GPS_GPIO(GPIO_EXP_GPIO_1)
#define GPS_HUB_PGOOD                      MCP23008_GPS_GPIO(GPIO_EXP_GPIO_2)
#define GPS_PGOOD                          MCP23008_GPS_GPIO(GPIO_EXP_GPIO_3)
#define GPS2_IO_EXPD_INT                   MCP23008_GPS_GPIO(GPIO_EXP_GPIO_4)
#define GPS_TRANS_WFDOUT                   MCP23008_GPS_GPIO(GPIO_EXP_GPIO_5)
#define GPS_FDTI_RESETN                    MCP23008_GPS_GPIO(GPIO_EXP_GPIO_6)
#define GPS_ON                             MCP23008_GPS_GPIO(GPIO_EXP_GPIO_7)


//Address for EPS interface

#define EPS_CONV_BRD_ADDR     (0x55 <<1) 	///< EPS Converter Board Address
#define EPS_OP_CH_BRD_ADDR    (0x56 <<1) 	///< EPS Operational Channel Board Address

#define GPS_EN_SLV_ADDR				0x4E	 ///< GPS Board Slave Address
#define GPS_BRD_EN_GPIO_PINS  		0x20	 ///< GPS Board GPIO Pin mask

#define PLD_SRVR_EN_SLV_ADDR  		0x42	 ///< Payload Server Board slave address
#define PLD_SRVR_EN_GPIO_PINS 		0xEC	 ///< Payload Server Board GPIO Pin mask

#define EDGE_BRD_U14_EN_SLV_ADDR 	0x46	 ///< EDGE Board U14 slave address
#define EDGE_BRD_U16_EN_SLV_ADDR 	0x42	 ///< EDGE Board U16 slave address
#define EDGE_BRD_EN_GPIO_PIN0 		0x01	 ///< EDGE Board GPIO Pin 0 mask
#define EDGE_BRD_EN_GPIO_PIN1 		0x04	 ///< EDGE Board GPIO Pin 1 mask
#define EDGE_BRD_EN_GPIO_PIN3 		0x08	 ///< EDGE Board GPIO Pin 3 mask
#define EDGE_BRD_EN_GPIO_PINS	 	(EDGE_BRD_EN_GPIO_PIN0|EDGE_BRD_EN_GPIO_PIN1|EDGE_BRD_EN_GPIO_PIN3) ///< EDGE Board GPIO Pin mask




#endif
