#ifndef _MFCC_TC_TM_SAMPLE_H_
#define _MFCC_TC_TM_SAMPLE_H_

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <tc_common.h>
#include <pthread.h>
#include <tc_tm_lib_common.h>
#include <comms_al.h>
#include <sys/socket.h>
#include <arpa/inet.h>
#include <unistd.h>
#include "mfcc_sample_app.h"
#include "mfcc_tc_tm_sample.h"
#include "tm_common.h"
#include "eps_tc_tm.h"
//#include "config.h"
#include "notify_apps.h"
#include <stdbool.h>

#define CAN_BYPASS
#define SCH_TC_FILE "tc_sch_data.txt"

/**
 *  *  @brief  Data Type definitions
 *   */
typedef unsigned int uint32;
typedef unsigned short uint16;
typedef unsigned char uint8;

typedef int int32;
typedef float f32;
typedef short int16;
typedef char int8;

/**
 *  @brief  TCTM Encoder Decoder API Execution status macros
 */
#define TCTM_OK                   (0)      ///< Success return value
#define TCTM_NULL_PTR             (-1)     ///< Null pointer return value

//#define ENBL_DBG_PRNT                              ///< Macro for enabling debug prints

/// TC Socket interface parameter configurations
#define MFCC_TC_SOCKET_IP_ADDR      "192.168.10.2" ///< IP address of socket used for TC transmission
#define MFCC_TC_SOCKET_PORT_ADDR    5001           ///< Port address of socket used for TC transmission

/// TM Socket interface parameter configurations
#define MFCC_TM_SOCKET_IP_ADDR      "192.168.10.2" ///< IP address of socket used for TM reception
#define MFCC_TM_SOCKET_PORT_ADDR    5002           ///< Port address of socket used for TM transmission

/// TC_TM Frame Parameter configurations
#define MAX_TC_BUFF_SIZE            1600           ///< Maximum TC buffer size allocation
#define MAX_TM_BUFF_SIZE            (64 *1024)     ///< Maximum TM buffer size allocation
#define TC_FRAME_SOF                0xA5           ///< Start of frame definition for TC
#define RECV_SAT_ID                 0x01           ///< Satellite ID value
#define CRYPTO_ENCRYP_ENBL          0x00           ///< Encryption configuration value
#define SOURCE_GROUND_STN_ID        0x01           ///< Ground station ID value
#define TC_QOS_CFG                  0x01           ///< TC_TM Quality of Service configuration value

#define TC_SRC_GS                   0x01           ///< TC Source ID configuration value for Ground Station
#define TC_DST_OBC                  0x81           ///< TC Destination ID configuration value for OBC
#define TC_DST_PS                   0x86           ///< TC Destination ID configuration value for PS
#define TC_DST_PLD_TC               0x88
#define TC_DST_PLD_AI               0x89
#define TC_DST_PLD_NET              0x8a
#define TC_DST_PLD_ZES              0x8b
#define TC_DST_PLD_SL               0x8c
#define TC_DST_SBND_COMMS           0x84           ///< TC Destination ID configuration value for COMMS - Sband
#define TC_DST_XBND_COMMS           0x85           ///< TC Destination ID configuration value for COMMS - Sband
#define TC_DST_UHF_COMMS            0x92           ///< TC Destination ID configuration value for COMMS - Sband
#define TC_DST_SDR_APP              0x93
#define TC_DST_EPS              0x83
#define TC_DST_ADCS                 0x82           ///< TC Destination ID configuration value for ADCS
#define TC_DST_TEST_LAYER           0x95           ///< TC Destination ID configuration value for TEST LAYER
#define TC_DST_FTM_OTSU             0x8D
#define TC_DST_FTM_DBGLOG           0x8E
#define TC_DST_FTM_OBC_COMMS 	    0x8F
#define TC_DST_FTM_OBC_EPS	    0x90
#define TC_DST_FTM_OBC_ADCS         0x91
#define TC_DST_FTM_PS_COMMS         0x94


#define TM_SRC_OBC                  0x81           ///< TM Source ID configuration value for OBC
#define TM_SRC_PS                   0x86           ///< TM Source ID configuration value for PS
#define TM_SRC_SBND_COMMS           0x84           ///< TM Source ID configuration value for COMMS - Sband
#define TM_DST_GS                   0x01           ///< TM Destination ID configuration value for GS

/// Number of EPS Output Channels

#define MAX_TCTM_DBG_INFO 16

#define SBAND_IP_ADDR_MAX_SIZE			 50
#define SBAND_SYS_ETH_IP_MAX_SIZE    		 SBAND_IP_ADDR_MAX_SIZE
#define SBAND_SYS_GT_IP_MAX_SIZE    	    	 SBAND_IP_ADDR_MAX_SIZE
#define SBAND_SYS_SPACELINK_IP_MAX_SIZE     	 SBAND_IP_ADDR_MAX_SIZE
#define SBAND_SYS_SPACELINK_GT_IP_MAX_SIZE       SBAND_IP_ADDR_MAX_SIZE
#define SBAND_MAX_CRYPTO_KEY_MAX_SIZE            32
#define SBAND_TX_CRYPTO_KEY_MAX_SIZE             SBAND_MAX_CRYPTO_KEY_MAX_SIZE   
#define SBAND_RX_CRYPTO_KEY_MAX_SIZE             SBAND_MAX_CRYPTO_KEY_MAX_SIZE   
#define SBAND_CSP_ROUTE_MAX_SIZE                 100
#define SBAND_SYS_NAME_MAX_SIZE                  20
#define SBAND_CSP_TM_MAX_CNT                     3
#define SCH_ORBIT_LUT_MAP_MAX_CNT                16

#define MAX_INT_PHER_CNT 11
#define MAX_EXT_PHER_CNT 1
#ifdef UHF_SIM
#define RADIO_MOD_ID    2
#endif

#ifdef SBAND_SIM
#define RADIO_MOD_ID    1
#endif

#define BCON_MSG_SZ        						18


#define MAX_RBT_RSN_ARR 20


/**
 *  @brief  CRRN Header field parameter macros
 */
#define CRRN_TYPE_POS       (26U)
#define CRRN_TYPE_MASK      (0x3U << CRRN_TYPE_POS)
#define CRRN_ID_POS         (16U)
#define CRRN_ID_MASK        (0x3FF << CRRN_ID_POS)
#define CRRN_DATA_LEN_POS   (0U)
#define CRRN_DATA_LEN_MASK  (0xFFFFU << CRRN_DATA_LEN_POS)

#define MEM_TYPE_FLAG_OFST (31)                    ///< Memory type flag offset

#define TEMP_SNS_CNT   6
#define VOLT_SNS_CNT   6
#define CUR_SNS_CNT    6
/**
 * @brief structure that holds the interface message header
 *
 * Bit Name    Value Description
 * 31:28  Reserved
 * 27:26  CRRN Type
 * 25:16  CRRN ID
 * 15:0   Data Length Indicator
 */
typedef struct _icm_header
{
    int crrn_type;
    int crrn_id;
    int data_len;
}icm_header_s;

/**
 * @brief This structure contains control variables
 * to handle test case response
 */
typedef enum
{
    BUFF_REQ_SINGLE_QUEUE=1,
    BUFF_REQ_MULTIPLE_QUEUE,
    ENQUEUE_REQ_SINGLE_QUEUE,
    ENQUEUE_REQ_MULTIPLE_QUEUE,
    BUFF_REQ_WITHOUT_PLD,
    BUFF_REQ_INVALID_QUEUE,
    ENQUEUE_REQ_WITHOUT_PLD,
    ENQUEUE_REQ_INVALID_QUEUE,
    ENQUEUE_REQ_INACTIVE_QUEUE,
    ENQUEUE_REQ_WRAP_DSB_DATA_DROP,
    ENQUEUE_REQ_QUEUE_FULL,
    BUFF_REQ_QUEUE_CREATE_FAIL,
    FLUSH_SUCC_VAL_MOD_QUEUE_PRI,
    FLUSH_FAIL_INVAL_MOD_QUEUE_PRI,
    FLUSH_SUCC_INVAL_MOD_QUEUE_VAL_PRI,
    FLUSH_FAIL_VAL_MOD_INVAL_QUEUE_PRI,
    FLUSH_SUCC_VAL_MOD_PRI_INVAL_QUEUE,
    FLUSH_FAIL_VAL_MOD_QUEUE_NOT_ACTIVE,
    CHNGE_QPRI_SUCC_INVAL_MOD_QUEUE_VAL_PRI,
    CHNGE_QPRI_FAIL_VAL_MOD_INVAL_QUEUE_PRI,
    CHNGE_QPRI_SUCC_VAL_MOD_QUEUE_PRI,
    CHNGE_QPRI_FAIL_VAL_MOD_QUEUE_INACTIVE,
    CHNGE_QPRI_SUCC_VAL_MOD_QUEUE_ACTIVE,
    DEL_QUEUE_FAIL_INACTIVE_QUEUE,
    DEL_QUEUE_SUCC_ACTIVE_QUEUE,
    CHNGE_MOD_PRI_FAIL_INVAL_MOD,
    CHNGE_MOD_PRI_FAIL_VAL_MOD_PRI,
    CHNGE_MOD_PRI_SUCC_VAL_MOD_PRI,
    DL_REQ_FAIL_VAL_MOD_QUEUE_INACTIVE,
    DL_REQ_SUCC_VAL_MOD_QUEUE_ACTIVE,
    DL_REQ_FAIL_INVAL_MOD_QUEUE_PRI,
    DL_REQ_SUCC_INVAL_MOD_QUEUE_VAL_PRI,
    DL_REQ_FAIL_VAL_MOD_INVAL_QUEUE_PRI,
    DL_REQ_SUCC_VAL_MOD_QUEUE_PRI,
    EPS_STRESS_TEST_SIMU,
    ADCS_STRESS_TEST_SIMU,
    COMMS_SBAND_STRESS_TEST_SIMU,
    COMMS_UHF_STRESS_TEST_SIMU,
    SENSORS_STRESS_TEST_SIMU,
    OBC_STRESS_TEST_SIMU,
    ERROR_HANDLER_STRESS_TEST_SIMU,
    ALL_MODULE_QUEUE_SIZE,
    MAX_TM_DOWNLOAD_CHECK_62K,

    HM_TEST_CASE_MAX

}hm_test_cases;

#define SNS_CALIB_DATA_CNT 7
//#define  EPS_BTRY_SIM_EN

/*!
 *  @brief This enum holds the enumeration values of TC and TM ID
 */
typedef enum _tc_tm_id
{
    // TODO - Enumeration value to be updated after discussion with team
/*    TC_TRGT_PT = 55,
    TM_TRGT_PT = 55,*/

    // File Transfer
    TC_FTCI = 100,
    TM_FTSR = 101,
    TC_FTDS = 102,
    TC_FTFCI = 103,

    TM_FTCI = 104,
    TC_FTSR = 105,
    TM_FTDS = 106,
    TM_FTFCI = 107,

    // TTY Debug
    TC_TTY_START = 116,
    TM_TTY_START = 116,

    TC_TTY_DEBUG = 117,
    TM_TTY_DEBUG = 117,

    TC_TTY_END = 118,
    TM_TTY_END = 118,
    // TBD: This is the ID provided by ADCS vendor
/*    TC_LOC_INFO = 150,
    TM_LOC_INFO = 150,*/

    // EPS
    TC_SET_CONV_BOARD_PARM = 200,
    TM_SET_CONV_BOARD_PARM = 200,

    TC_GET_CONV_BOARD_PARM = 201,
    TM_GET_CONV_BOARD_PARM = 201,

    TC_SET_BATT_BOARD_PARM =202,
    TM_SET_BATT_BOARD_PARM =202,

    TC_GET_BATT_BOARD_PARM =203,
    TM_GET_BATT_BOARD_PARM =203,

    TC_SET_OUT_CHNL_ENB =204,
    TM_SET_OUT_CHNL_ENB =204,

    TC_SET_OUT_CHNL_CUR_LMT =205,
    TM_SET_OUT_CHNL_CUR_LMT =205,

    TC_GET_OUT_CHNL_PARM =206,
    TM_GET_OUT_CHNL_PARM =206,

    TC_SET_EPS_MODE_CFG = 207,
    TM_SET_EPS_MODE_CFG = 207,

    TC_GET_EPS_MODE_CFG =208,
    TM_GET_EPS_MODE_CFG =208,

    TC_GET_EPS_ALERT_INFO = 209,
    TM_GET_EPS_ALERT_INFO = 209,
#if 0
    TC_GET_EPS_VAR_VAL = 210,
    TM_GET_EPS_VAR_VAL = 210,
#endif
    TC_SET_EPS_CTRL_CHNL_ST = 211,
    TM_SET_EPS_CTRL_CHNL_ST= 211,

    TC_SET_EPS_CTRL_DEV_TMR = 212,
    TM_SET_EPS_CTRL_DEV_TMR = 212,

    TC_SET_EPS_BTRY_CTRL_CH_MAP = 213,
    TM_SET_EPS_BTRY_CTRL_CH_MAP = 213,

    TC_GET_EPS_BTRY_CTRL_CH_MAP = 214,
    TM_GET_EPS_BTRY_CTRL_CH_MAP = 214,


    TC_GET_EPS_DEV_HW_STS = 215,
    TM_GET_EPS_DEV_HW_STS = 215,

    TC_SET_EPS_BTRY_VOLT_THRSHLD = 216,
    TM_SET_EPS_BTRY_VOLT_THRSHLD = 216,
 	
    TC_SET_SSD_SLOT =217,
    TM_SET_SSD_SLOT = 217,
    
    TC_SET_SSD_HEAT_ENABLE = 218,
    TM_SET_SSD_HEAT_ENABLE = 218,
  
    TC_EPS_FW_UPDATE = 235,
    TM_EPS_FW_UPDATE =235,
 
    TC_GET_EPS_FW = 236,
    TM_GET_EPS_FW = 236,
#if defined(LINUX_TEMP_PORT) || defined(EPS_BTRY_SIM_EN)

     TC_EPS_SIM_BTRY_VOLT = 219,
     TM_EPS_SIM_BTRY_VOLT = 219,
#endif
    
	TC_SET_SCH_ON_OFF = 220,
    TM_SET_SCH_ON_OFF = 220,

    TC_EPS_GET_BUFFER = 221,
    TM_EPS_GET_BUFFER = 221,

    TC_EPS_HEALTH_STS = 222,
    TM_EPS_HEALTH_STS = 222,

    TC_EPS_GET_CRC = 230,
    TM_EPS_GET_CRC = 230,

#ifdef EPS_SIMU_EN
    TC_SET_EPS_SIM_EXPOSURE_TYPE = 231,
    TM_SET_EPS_SIM_EXPOSURE_TYPE = 231,
    
    TC_SET_EPS_SIM_CH_CRNT = 232,
    TM_SET_EPS_SIM_CH_CRNT = 232,
    
    TC_SET_EPS_SIM_BTRY_VOLT = 233,
    TM_SET_EPS_SIM_BTRY_VOLT = 233,
    
    TC_SET_EPS_SIM_BTRY_TEMP = 234,
    TM_SET_EPS_SIM_BTRY_TEMP = 234,
#endif

#if 0
    TC_PWR_CTRL_THRUSTER = 214,
    TM_PWR_CTRL_THRUSTER = 214,

    TC_PWR_CTRL_EDGE_BOARD = 215,
    TM_PWR_CTRL_EDGE_BOARD = 215,

#endif
    TC_ALERT_FLAG_OVR_CUR_ERR_HANDLE = 237,
    TM_ALERT_FLAG_OVR_CUR_ERR_HANDLE = 237,

	TC_EPS_MCU_RST = 238,
    	TM_EPS_MCU_RST = 238,

        TC_SET_EPS_COM_TIMEOUT = 239,
        TM_SET_EPS_COM_TIMEOUT = 239,

        TC_GET_EPS_COM_TIMEOUT = 240,
        TM_GET_EPS_COM_TIMEOUT = 240,

    TC_NVM_COMMIT =250,
    TM_NVM_COMMIT =250,

    TC_NVM_COMMIT_PRDCTY_TIM_CFG=251,
    TM_NVM_COMMIT_PRDCTY_TIM_CFG=251,

    TC_GET_SSD_SLOT=252,
    TM_GET_SSD_SLOT=252,

    TC_GET_SSD_HEAT_ENABLE=253,
    TM_GET_SSD_HEAT_ENABLE=253,

    TC_SET_SSD_HEAT_COIL_PRDCTY=254,
    TM_SET_SSD_HEAT_COIL_PRDCTY=254,
       
    TC_GET_SSD_HEAT_COIL_PRDCTY=255,
    TM_GET_SSD_HEAT_COIL_PRDCTY=255,
   
    TC_GET_OBC_NVM_REVISION_NUM = 256,
    TM_GET_OBC_NVM_REVISION_NUM = 256,
   
    // COMMS 
    TC_SET_COMMS_TX_CFG = 300,
    TC_SET_COMMS_TX_CFG_FREQ,
    TC_SET_COMMS_TX_CFG_TYPE,
    TC_SET_COMMS_TX_CFG_RATE,
    TC_SET_COMMS_TX_CFG_ROLLOFF,
    TC_SET_COMMS_TX_CFG_POUT,
    TC_SET_COMMS_TX_CFG_ALC_MODE,
    TC_SET_COMMS_TX_CFG_RS,
    TC_SET_COMMS_TX_CFG_CC,
    TC_SET_COMMS_TX_CFG_RAND,
    TC_SET_COMMS_TX_CFG_CRC,
    TC_SET_COMMS_TX_CFG_IDLETIME,
    TC_SET_COMMS_TX_CFG_SIZE,
    TC_SET_COMMS_TX_CFG_ID,
    TC_SET_COMMS_TX_CFG_CRYPTO,
    TC_SET_COMMS_TX_CFG_PA_TEMPLIMIT,
		TC_SET_COMMS_ASM_CFG,

    TC_SET_COMMS_RX_CFG = 319,
    TC_SET_COMMS_RX_CFG_FREQ,
    TC_SET_COMMS_RX_CFG_TYPE,
    TC_SET_COMMS_RX_CFG_RATE,
    TC_SET_COMMS_RX_CFG_ROLLOFF,
    TC_SET_COMMS_RX_CFG_AFC,
    TC_SET_COMMS_RX_CFG_RS,
    TC_SET_COMMS_RX_CFG_CC,
    TC_SET_COMMS_RX_CFG_RAND,
    TC_SET_COMMS_RX_CFG_CRC,
    TC_SET_COMMS_RX_CFG_SIZE,
    TC_SET_COMMS_RX_CFG_ID,
    TC_SET_COMMS_RX_CFG_CRYPTO,
		TC_SET_COMMS_BCH_CFG,
		TC_COMMS_SBAND_BEACON_CFG,
		TC_COMMS_SBAND_BEACON_START,
		TC_COMMS_SBAND_BEACON_STOP,


    TC_SET_COMMS_SYS_CFG = 340,
		TC_SET_COMMS_ERR_CFG,
    TC_SET_COMMS_BOOT_CFG,
    TC_SET_COMMS_GWDT_CFG,
    TC_SET_COMMS_CAN_CFG,
    TC_SET_COMMS_UART_CFG,
    TC_SET_COMMS_CSP_CFG,
    TC_SET_COMMS_NET_CFG,

    TC_GET_COMMS_TX_CFG = 350,
    TC_GET_COMMS_TX_CFG_FREQ,
    TC_GET_COMMS_TX_CFG_TYPE,
    TC_GET_COMMS_TX_CFG_RATE,
    TC_GET_COMMS_TX_CFG_ROLLOFF,
    TC_GET_COMMS_TX_CFG_POUT,
    TC_GET_COMMS_TX_CFG_ALC_MODE,
    TC_GET_COMMS_TX_CFG_RS,
    TC_GET_COMMS_TX_CFG_CC,
    TC_GET_COMMS_TX_CFG_RAND,
    TC_GET_COMMS_TX_CFG_CRC,
    TC_GET_COMMS_TX_CFG_IDLETIME,
    TC_GET_COMMS_TX_CFG_SIZE,
    TC_GET_COMMS_TX_CFG_ID,
    TC_GET_COMMS_TX_CFG_CRYPTO,
    TC_GET_COMMS_TX_CFG_PA_TEMPLIMIT,
    TC_GET_COMMS_TX_CFG_FRAMES,
    TC_GET_COMMS_TX_CFG_PWR_FWD,
    TC_GET_COMMS_TX_CFG_PWR_RFL,
    TC_GET_COMMS_RX_CFG = 369,
    TC_GET_COMMS_RX_CFG_FREQ,
    TC_GET_COMMS_RX_CFG_TYPE,
    TC_GET_COMMS_RX_CFG_RATE,
    TC_GET_COMMS_RX_CFG_ROLLOFF,
    TC_GET_COMMS_RX_CFG_AFC,
    TC_GET_COMMS_RX_CFG_RS,
    TC_GET_COMMS_RX_CFG_CC,
    TC_GET_COMMS_RX_CFG_RAND,
    TC_GET_COMMS_RX_CFG_CRC,
    TC_GET_COMMS_RX_CFG_SIZE,
    TC_GET_COMMS_RX_CFG_ID,
    TC_GET_COMMS_RX_CFG_CRYPTO,
    TC_GET_COMMS_RX_CFG_FRAMES,
    TC_GET_COMMS_RX_CFG_DETECTED,
    TC_GET_COMMS_RX_CFG_RSSI,
    TC_GET_COMMS_RX_CFG_FREQERR,
    TC_GET_COMMS_RX_CFG_SYMERR,
    TC_GET_COMMS_RX_CFG_EBN0,
    TC_GET_COMMS_RX_CFG_CARRIER_LOCK,
    TC_GET_COMMS_RX_FRAME_LOCK,
    TC_GET_COMMS_SYS_CFG,
	    TC_GET_COMMS_BOOT_ACTIVATE,
    TC_GET_COMMS_BOOT_CFG,
    TC_GET_COMMS_GWDT_CFG,
    TC_GET_COMMS_CAN_CFG,
    TC_GET_COMMS_UART_CFG,
    TC_GET_COMMS_CSP_CFG,
    TC_GET_COMMS_NET_CFG,
    TC_GET_COMMS_TM_INFO= 398,
    TC_GET_COMMS_RX_TM_INFO = 399,
    TC_GET_COMMS_TX_TM_INFO = 400,
    TC_COMMS_LOAD_CFG,
    TC_COMMS_SAVE_CFG,
    TC_COMMS_RESET_CFG,
    TC_COMMS_LOCK_CFG,
    TC_COMMS_UNLOCK_CFG,
    TC_COMMS_ERASE_CFG,
    TC_COMMS_FW_CFG,
	    TC_COMMS_CUSTOM_TX,
		TC_COMMS_RESERVED,
    TC_COMMS_INITIAL_SYNC = 410,
		TC_COMMS_BEACON_TX,
	TC_SBAND_GET_TM_ALL,
	TC_SBAND_GET_TM_STORE,
    TC_GET_COMMS_CSP_TM_INFO,
		TC_GET_COMMS_ASM_CFG,
		TC_GET_COMMS_BCH_CFG,
		TC_GET_COMMS_BEACON_CFG,
		TC_COMMS_RX_SEL_CFG = 418,
		TC_COMMS_RX_SEL_DSB = 419,

    TC_SBAND_SET_IDLE_CFG = 450,
    TC_SBAND_SET_RESET,
    TC_SBAND_SET_START_RF_RCV,
    TC_SBAND_SET_RF_XMT_DATA,
    TC_SBAND_SET_DVBS2_CONF,
    TC_SBAND_SET_IP_ADR_SAVE,
    TC_SBAND_SET_IP_ADR,
    TC_SBAND_GET_IP_ADR,
    TC_SBAND_GET_FLAGS_CONF,
    TC_SBAND_SET_FLAGS_CONF,
    TC_SBAND_SET_VERSION,
    TC_SBAND_GET_VERSION,
    TC_SBAND_SET_DEVICE_CONF,
    TC_SBAND_GET_DEVICE_CONF,
    TC_SBAND_GET_FEATURE_SELECT,
	    TC_SBAND_GET_COMMS_TM_INFO,
    TC_SBAND_GET_XPA_INF,
    TC_SBAND_SET_PROD_KEY,

    TM_SET_COMMS_TX_CFG = 300,
    TM_SET_COMMS_TX_CFG_FREQ,
    TM_SET_COMMS_TX_CFG_TYPE,
    TM_SET_COMMS_TX_CFG_RATE,
    TM_SET_COMMS_TX_CFG_ROLLOFF,
    TM_SET_COMMS_TX_CFG_POUT,
    TM_SET_COMMS_TX_CFG_ALC_MODE,
    TM_SET_COMMS_TX_CFG_RS,
    TM_SET_COMMS_TX_CFG_CC,
    TM_SET_COMMS_TX_CFG_RAND,
    TM_SET_COMMS_TX_CFG_CRC,
    TM_SET_COMMS_TX_CFG_IDLETIME,
    TM_SET_COMMS_TX_CFG_SIZE,
    TM_SET_COMMS_TX_CFG_ID,
    TM_SET_COMMS_TX_CFG_CRYPTO,
    TM_SET_COMMS_TX_CFG_PA_TEMPLIMIT,
		TM_SET_COMMS_ASM_CFG,

	    TM_SET_COMMS_RX_CFG = 319,
    TM_SET_COMMS_RX_CFG_FREQ,
    TM_SET_COMMS_RX_CFG_TYPE,
    TM_SET_COMMS_RX_CFG_RATE,
    TM_SET_COMMS_RX_CFG_ROLLOFF,
    TM_SET_COMMS_RX_CFG_AFC,
    TM_SET_COMMS_RX_CFG_RS,
    TM_SET_COMMS_RX_CFG_CC,
    TM_SET_COMMS_RX_CFG_RAND,
    TM_SET_COMMS_RX_CFG_CRC,
    TM_SET_COMMS_RX_CFG_SIZE,
    TM_SET_COMMS_RX_CFG_ID,
    TM_SET_COMMS_RX_CFG_CRYPTO,
		TM_SET_COMMS_BCH_CFG,
		TM_COMMS_SBAND_BEACON_CFG,
		TM_COMMS_SBAND_BEACON_START,
		TM_COMMS_SBAND_BEACON_STOP,

	    TM_SET_COMMS_SYS_CFG = 340,
		TM_SET_COMMS_ERR_CFG,
    TM_SET_COMMS_BOOT_CFG,
    TM_SET_COMMS_GWDT_CFG,
    TM_SET_COMMS_CAN_CFG,
    TM_SET_COMMS_UART_CFG,
    TM_SET_COMMS_CSP_CFG,
    TM_SET_COMMS_NET_CFG,
    TM_GET_COMMS_TX_CFG = 350,
    TM_GET_COMMS_TX_CFG_FREQ,
    TM_GET_COMMS_TX_CFG_TYPE,
    TM_GET_COMMS_TX_CFG_RATE,
    TM_GET_COMMS_TX_CFG_ROLLOFF,
    TM_GET_COMMS_TX_CFG_POUT,
    TM_GET_COMMS_TX_CFG_ALC_MODE,
    TM_GET_COMMS_TX_CFG_RS,
    TM_GET_COMMS_TX_CFG_CC,
    TM_GET_COMMS_TX_CFG_RAND,
    TM_GET_COMMS_TX_CFG_CRC,
    TM_GET_COMMS_TX_CFG_IDLETIME,
    TM_GET_COMMS_TX_CFG_SIZE,
    TM_GET_COMMS_TX_CFG_ID,
    TM_GET_COMMS_TX_CFG_CRYPTO,
    TM_GET_COMMS_TX_CFG_PA_TEMPLIMIT,
    TM_GET_COMMS_TX_CFG_FRAMES,
    TM_GET_COMMS_TX_CFG_PWR_FWD,
    TM_GET_COMMS_TX_CFG_PWR_RFL,
    TM_GET_COMMS_RX_CFG,
    TM_GET_COMMS_RX_CFG_FREQ,
    TM_GET_COMMS_RX_CFG_TYPE,
    TM_GET_COMMS_RX_CFG_RATE,
    TM_GET_COMMS_RX_CFG_ROLLOFF,
    TM_GET_COMMS_RX_CFG_AFC,
    TM_GET_COMMS_RX_CFG_RS,
    TM_GET_COMMS_RX_CFG_CC,
    TM_GET_COMMS_RX_CFG_RAND,
    TM_GET_COMMS_RX_CFG_CRC,
    TM_GET_COMMS_RX_CFG_SIZE,
    TM_GET_COMMS_RX_CFG_ID,
    TM_GET_COMMS_RX_CFG_CRYPTO,
    TM_GET_COMMS_RX_CFG_FRAMES,
    TM_GET_COMMS_RX_CFG_DETECTED,
    TM_GET_COMMS_RX_CFG_RSSI,
    TM_GET_COMMS_RX_CFG_FREQERR,
    TM_GET_COMMS_RX_CFG_SYMERR,
    TM_GET_COMMS_RX_CFG_EBN0,
    TM_GET_COMMS_RX_CFG_CARRIER_LOCK,
    TM_GET_COMMS_RX_FRAME_LOCK,
    TM_GET_COMMS_SYS_CFG,
	    TM_GET_COMMS_BOOT_ACTIVATE,
    TM_GET_COMMS_BOOT_CFG,
    TM_GET_COMMS_GWDT_CFG,
    TM_GET_COMMS_CAN_CFG,
    TM_GET_COMMS_UART_CFG,
    TM_GET_COMMS_CSP_CFG,
    TM_GET_COMMS_NET_CFG,
    TM_GET_COMMS_TM_INFO,
    TM_GET_COMMS_RX_TM_INFO,
    TM_GET_COMMS_TX_TM_INFO,
    TM_COMMS_LOAD_CFG,
    TM_COMMS_SAVE_CFG,
    TM_COMMS_RESET_CFG,
    TM_COMMS_LOCK_CFG,
    TM_COMMS_UNLOCK_CFG,
    TM_COMMS_ERASE_CFG,
    TM_COMMS_FW_CFG,
	    TM_COMMS_CUSTOM_TX,
	    TM_COMMS_RESERVED,
    TM_COMMS_INITIAL_SYNC,
		TM_COMMS_BEACON_TX,
		TM_SBAND_GET_TM_ALL,
		TM_SBAND_GET_TM_STORE,
    TM_GET_COMMS_CSP_TM_INFO,
		TM_GET_COMMS_ASM_CFG,
		TM_GET_COMMS_BCH_CFG,
		TM_GET_COMMS_BEACON_CFG,
		TM_COMMS_RX_SEL_CFG = 418,
		TM_COMMS_RX_SEL_DSB = 419,


    TM_SBAND_SET_IDLE_CFG = 450,
    TM_SBAND_SET_RESET,
    TM_SBAND_SET_START_RF_RCV,
    TM_SBAND_SET_RF_XMT_DATA,
    TM_SBAND_SET_DVBS2_CONF,
    TM_SBAND_SET_IP_ADR_SAVE,
    TM_SBAND_SET_IP_ADR,
    TM_SBAND_GET_IP_ADR,
    TM_SBAND_GET_FLAGS_CONF,
    TM_SBAND_SET_FLAGS_CONF,
    TM_SBAND_SET_VERSION,
    TM_SBAND_GET_VERSION,
    TM_SBAND_SET_DEVICE_CONF,
    TM_SBAND_GET_DEVICE_CONF,
    TM_SBAND_GET_FEATURE_SELECT,
		TM_SBAND_GET_COMMS_TM_INFO,
    TM_SBAND_GET_XPA_INF,
    TM_SBAND_SET_PROD_KEY,

 
 
    TC_GET_PROC_UTIL_INFO =500,
    TM_GET_PROC_UTIL_INFO =500,

    TC_GET_MEM_UTIL_INFO =501,
    TM_GET_MEM_UTIL_INFO =501,

    TC_GET_FTM_SAVECONTEXT_STS =502,
    TM_GET_FTM_SAVECONTEXT_STS =502,

    TC_OBC_MEM_DOWLOAD = 503,
    TM_OBC_MEM_DOWLOAD = 503,

    // Interface
    TC_SET_UART_INTF_PARM = 509,
    TM_SET_UART_INTF_PARM = 509,

    TC_GET_UART_INTF_PARM = 510,
    TM_GET_UART_INTF_PARM = 510,

    TC_SET_USB_INTF_PARM = 511,
    TM_SET_USB_INTF_PARM = 511,

    TC_GET_USB_INTF_PARM = 512,
    TM_GET_USB_INTF_PARM = 512,

    TC_SET_I2C_INTF_PARM = 513,
    TM_SET_I2C_INTF_PARM = 513,

    TC_GET_I2C_INTF_PARM = 514,
    TM_GET_I2C_INTF_PARM = 514,

    TC_SET_CAN_INTF_PARM = 515,
    TM_SET_CAN_INTF_PARM = 515,

    TC_GET_CAN_INTF_PARM = 516,
    TM_GET_CAN_INTF_PARM = 516,

    TC_SET_ETH_INTF_PARM = 517,
    TM_SET_ETH_INTF_PARM = 517,

    TC_GET_ETH_INTF_PARM = 518,
    TM_GET_ETH_INTF_PARM = 518,

    TC_SET_SPI_INTF_PARM = 519,
    TM_SET_SPI_INTF_PARM = 519,

    TC_GET_SPI_INTF_PARM = 520,
    TM_GET_SPI_INTF_PARM = 520,

    // Sensors
    TC_SET_TEMP_SNS_CFG = 524,
    TM_SET_TEMP_SNS_CFG = 524,

    TC_GET_TEMP_SNS_CFG = 525,
    TM_GET_TEMP_SNS_CFG = 525,

    TC_SET_IMU_CFG = 526,
    TM_SET_IMU_CFG = 526,

    TC_GET_IMU_CFG = 527,
    TM_GET_IMU_CFG = 527,

    TC_SET_THRUST_CTRL_CFG = 528,
    TM_SET_THRUST_CTRL_CFG = 528,

    TC_GET_THRUST_CTRL_CFG = 529,
    TM_GET_THRUST_CTRL_CFG = 529,

    TC_SET_GPIO_EXP_CFG = 530,
    TM_SET_GPIO_EXP_CFG = 530,

    TC_GET_GPIO_EXP_CFG = 531,
    TM_GET_GPIO_EXP_CFG = 531,

    TC_SET_DIG_THERM_CFG = 532,
    TM_SET_DIG_THERM_CFG = 532,

    TC_GET_DIG_THERM_CFG = 533,
    TM_GET_DIG_THERM_CFG = 533,

    TC_SET_PWR_MON_CFG = 534,
    TM_SET_PWR_MON_CFG = 534,

    TC_GET_PWR_MON_CFG = 535,
    TM_GET_PWR_MON_CFG = 535,

    TC_SET_VOLT_CTRL_MON_CFG = 536,
    TM_SET_VOLT_CTRL_MON_CFG = 536,

    TC_GET_VOLT_CTRL_MON_CFG = 537,
    TM_GET_VOLT_CTRL_MON_CFG = 537,

    TC_SET_PWR_SEQ_MON_CFG =538,
    TM_SET_PWR_SEQ_MON_CFG =538,

    TC_GET_PWR_SEQ_MON_CFG = 539,
    TM_GET_PWR_SEQ_MON_CFG = 539,

    TC_SET_DATA_LOG_CFG = 540,
    TM_SET_DATA_LOG_CFG = 540,

    TC_GET_DATA_LOG_CFG =541,
    TM_GET_DATA_LOG_CFG =541,

    // Payload Server Power Controls
#if 0   
    TC_PS_PWR_ON = 542,
    TM_PS_PWR_ON = 542,

    TC_PS_PWR_OFF = 543,
    TM_PS_PWR_OFF = 543,

    TC_PLD_HW_PWR_ON = 544,
    TM_PLD_HW_PWR_ON = 544,

    TC_PLD_HW_PWR_OFF = 545,
    TM_PLD_HW_PWR_OFF = 545,
#endif
    TC_PLD_VM_PWR_ON = 545,
    TM_PLD_VM_PWR_ON = 545,

    TC_PLD_VM_PWR_OFF = 546,
    TM_PLD_VM_PWR_OFF = 546,

	TC_CONOPS_SCH_LUT_CFG = 547,
	TM_CONOPS_SCH_LUT_CFG = 547,

	TC_CONOPS_SCH_LUT_RUN_CTRL = 548,
	TM_CONOPS_SCH_LUT_RUN_CTRL = 548,

	TC_CONOPS_SCH_STS_INFO = 549,
	TM_CONOPS_SCH_STS_INFO = 549,

    TC_SET_CUR_TIME = 550,
    TM_SET_CUR_TIME = 550,

    TC_OBC_SOFT_RESET = 551,
    TM_OBC_SOFT_RESET = 551,


	TC_OTSU_GET_VERSION = 552,
	TM_OTSU_GET_VERSION = 552,
	
	TC_OBC_IPCC_TEST = 553,
    TM_OBC_IPCC_TEST = 553,
	TC_MEMD = 554,
	TM_MEMD = 554,
#if 0	
	TC_PWR_CTRL_SBAND = 555,
    TM_PWR_CTRL_SBAND = 555,


    TC_PWR_CTRL_XBAND = 556,
    TM_PWR_CTRL_XBAND = 556,

    TC_PWR_CTRL_ADCS = 557,
    TM_PWR_CTRL_ADCS = 557,
#endif

    TC_DEV_HW_STS = 558,
    TM_DEV_HW_STS = 558,
  
    TC_GET_SENSOR_DATA = 560,
    TM_GET_SENSOR_DATA = 560,

    TC_PS_STAGED_TC = 561,
    TM_PS_STAGED_TC = 561,

	TC_FTDB = 563,
	TM_FTDR = 564,

    TC_DEFERRED_STRG = 565,
    TM_DEFERRED_STRG = 565,

	TC_EXTRNL_MEM_TEST = 570,
	TM_EXTRNL_MEM_TEST = 570,

    TC_SNS_THRSLD_STS = 571,
    TM_SNS_THRSLD_STS = 571,
	
    TC_GET_OBC_SW_STS = 575,
    TM_GET_OBC_SW_STS = 575,

    TC_NVM = 576,
    TM_NVM = 576,

    TC_TM_MNGR_GS_CONTACT = 577,
    TM_MNGR_GS_CONTACT = 577,
	
	TC_FTDR = 578,
	TM_FTDB = 579,

    TC_SET_MIN_REBOOT_TIME=580,
    TM_SET_MIN_REBOOT_TIME=580,

    TC_XBAND = 566,
    TM_XBAND = 566,
   
    TC_GET_CUR_TIME = 581,
    TM_GET_CUR_TIME = 581, 

    TC_TCTM_DEQUEUE=582,
	TM_TCTM_DEQUEUE=582,

    TC_GET_SYS_UPTIME=583,
    TM_GET_SYS_UPTIME=583,

    TC_SET_RADIO_MODULE_ID=584,
    TM_SET_RADIO_MODULE_ID=584,

 TC_ERR_HANDLER_READ_FAULTS=590,
        TM_ERR_HANDLER_READ_FAULTS=590,

        TC_ERR_HANDER_READ_GROUP_ERROR_STATUS=591,
        TM_ERR_HANDER_READ_GROUP_ERROR_STATUS=591,

        TC_ERR_HANDLER_GET_ERROR_HISTORY=592,
        TM_ERR_HANDLER_GET_ERROR_HISTORY=592,


		TC_ERR_HANDLER_RUN_BIST=593,
		TM_ERR_HANDLER_RUN_BIST=593,

    TC_GET_TCTM_DBG_INFO = 594,
    TM_GET_TCTM_DBG_INFO = 594,

    TC_LOG_DOWNLOAD_BLOCKS=585,
    TM_LOG_DOWNLOAD_BLOCKS=585,

    TC_LOG_LEVEL_FILTER_CONFIG=586,
    TM_LOG_LEVEL_FILTER_CONFIG=586,

	TC_READ_LOG_INFO=587,
	TM_READ_LOG_INFO=587,

    TC_LOG_DOWNLOAD_BACKUP_BLOCKS=588,
    TM_LOG_DOWNLOAD_BACKUP_BLOCKS=588,

    TC_OBC_ES_IPCC_TEST = 614,
    TM_OBC_ES_IPCC_TEST = 614,



	TC_OTSU_CURRENT_STATUS = 626,
	TM_OTSU_CURRENT_STATUS = 626,

	TC_OTSU_SEND_FW_UPDATE_BOOT_CFG = 627,
	TM_OTSU_SEND_FW_UPDATE_BOOT_CFG = 627,

	TC_OTSU_INTEGERATION_TEST_CMD = 628,
	TM_OTSU_INTEGERATION_TEST_CMD = 628,

	TC_OTSU_GET_FW_UPDATE_STS = 629,
	TM_OTSU_GET_FW_UPDATE_STS = 629,

	TC_OTSU_GET_BOOT_CFG_INFO = 630,
	TM_OTSU_GET_BOOT_CFG_INFO = 630,



	TC_OTSU_READ_GSCONATCT_WAIT_TIME = 631,
	TM_OTSU_READ_GSCONATCT_WAIT_TIME = 631,


	TC_OTSU_SET_GSCONATCT_WAIT_TIME = 632,
	TM_OTSU_SET_GSCONATCT_WAIT_TIME = 632,

		TC_OTSU_READ_BOOTABLE_BLT1 = 633,
		TM_OTSU_READ_BOOTABLE_BLT1 = 633,

		TC_OTSU_READ_BOOTABLE_BLT2 = 634,
		TM_OTSU_READ_BOOTABLE_BLT2 = 634,

	    TC_OTSU_GET_NVM_FW_VERSION = 635,
		TM_OTSU_GET_NVM_FW_VERSION = 635,

		TC_OTSU_NOTIFICATION = 636,
		TM_OTSU_NOTIFICATION = 636,



    TC_XBAND_SET_IDLE_CFG = 700,
    TC_XBAND_SET_RESET,
    TC_XBAND_SET_START_RF_RCV,
    TC_XBAND_SET_RF_XMT_DATA,
    TC_XBAND_SET_DVBS2_CONF,
    TC_XBAND_SET_IP_ADR_SAVE,
    TC_XBAND_SET_IP_ADR,
    TC_XBAND_GET_IP_ADR,
    TC_XBAND_GET_FLAGS_CONF,
    TC_XBAND_SET_FLAGS_CONF,
    TC_XBAND_SET_VERSION,
    TC_XBAND_GET_VERSION,
    TC_XBAND_SET_DEVICE_CONF,
    TC_XBAND_GET_DEVICE_CONF,
    TC_XBAND_GET_FEATURE_SELECT,
    TC_XBAND_GET_HOUSE_KEEP,
    TC_XBAND_GET_XPA_INF,
    TC_XBAND_SET_PROD_KEY,

    TM_XBAND_SET_IDLE_CFG = 700,
    TM_XBAND_SET_RESET,
    TM_XBAND_SET_START_RF_RCV,
    TM_XBAND_SET_RF_XMT_DATA,
    TM_XBAND_SET_DVBS2_CONF,
    TM_XBAND_SET_IP_ADR_SAVE,
    TM_XBAND_SET_IP_ADR,
    TM_XBAND_GET_IP_ADR,
    TM_XBAND_GET_FLAGS_CONF,
    TM_XBAND_SET_FLAGS_CONF,
    TM_XBAND_SET_VERSION,
    TM_XBAND_GET_VERSION,
    TM_XBAND_SET_DEVICE_CONF,
    TM_XBAND_GET_DEVICE_CONF,
    TM_XBAND_GET_FEATURE_SELECT,
    TM_XBAND_GET_HOUSE_KEEP,
    TM_XBAND_GET_XPA_INF,
    TM_XBAND_SET_PROD_KEY,

    TC_COMMS_UHF_GET_TM_INFO = 800,
    TC_COMMS_UHF_SET_CFG,
    TC_COMMS_UHF_SET_TX_CFG,
    TC_COMMS_UHF_GET_TX_CFG,
    TC_COMMS_UHF_SET_RX_CFG,
    TC_COMMS_UHF_GET_RX_CFG,
    TC_COMMS_UHF_SET_TX_PKT_CFG,
    TC_COMMS_UHF_GET_TX_PKT_CFG,
    TC_COMMS_UHF_SET_RX_PKT_CFG,
    TC_COMMS_UHF_GET_RX_PKT_CFG,
    TC_COMMS_UHF_SET_PWR_CFG,
    TC_COMMS_UHF_GET_PWR_CFG,
    TC_COMMS_UHF_BEACON_CFG,
    TC_COMMS_UHF_BEACON_TX_ST,
    TC_COMMS_UHF_BEACON_TX_STOP,
    TC_COMMS_UHF_BEACON_DATA,
    TC_COMMS_UHF_FW_CFG,
    TC_COMMS_UHF_FW_CFG_ACTIVATE,
    TC_COMMS_UHF_CSP_TM_INFO,
    TC_COMMS_UHF_GET_TM_STORE,
    TC_COMMS_UHF_INITIAL_SYNC,
    TC_COMMS_UHF_GET_FW_STS,

    TM_COMMS_UHF_GET_TM_INFO = 800,
    TM_COMMS_UHF_SET_CFG,
    TM_COMMS_UHF_SET_TX_CFG,
    TM_COMMS_UHF_GET_TX_CFG,
    TM_COMMS_UHF_SET_RX_CFG,
    TM_COMMS_UHF_GET_RX_CFG,
    TM_COMMS_UHF_SET_TX_PKT_CFG,
    TM_COMMS_UHF_GET_TX_PKT_CFG,
    TM_COMMS_UHF_SET_RX_PKT_CFG,
    TM_COMMS_UHF_GET_RX_PKT_CFG,
    TM_COMMS_UHF_SET_PWR_CFG,
    TM_COMMS_UHF_GET_PWR_CFG,
    TM_COMMS_UHF_BEACON_CFG,
    TM_COMMS_UHF_BEACON_TX_ST,
    TM_COMMS_UHF_BEACON_TX_STOP,
    TM_COMMS_UHF_BEACON_DATA,
    TM_COMMS_UHF_FW_CFG,
    TM_COMMS_UHF_FW_CFG_ACTIVATE,
    TM_COMMS_UHF_CSP_TM_INFO,
    TM_COMMS_UHF_GET_TM_STORE,
    TM_COMMS_UHF_INITIAL_SYNC,
    TM_COMMS_UHF_GET_FW_STS,

    TC_TEST_GPIO=900,
    TM_TEST_GPIO=900,

    TC_TEST_SENSOR=901,
    TM_TEST_SENSOR=901,

    TC_TEST_GPIO_EXP =902,
    TM_TEST_GPIO_EXP =902,

    TC_SPI_UART_CONV_TEST =903,
    TM_SPI_UART_CONV_TEST =903,

    TC_ES_BRD_SELECT = 904,
    TM_ES_BRD_SELECT = 904,

    TC_PS_BRD_SELECT = 905,
    TM_PS_BRD_SELECT = 905,

    TC_ADC_SELECT = 906,
    TM_ADC_SELECT = 906,

    TC_IO_BRD_SELECT = 907,
    TM_IO_BRD_SELECT = 907,

    TC_PS_SSD_BRD_SELECT = 908,
    TM_PS_SSD_BRD_SELECT = 908,

    TC_ES_SSD_BRD_SELECT = 909,
    TM_ES_SSD_BRD_SELECT = 909,

    TC_AUTO_SENSOR_TEST = 910,
    TM_AUTO_SENSOR_TEST = 910,

    TC_I2C_ADXL345_TEST = 911,
    TM_I2C_ADXL345_TEST = 911,
    
    TC_UART_TX_RX_TEST = 912,
    TM_UART_TX_RX_TEST = 912,

    TC_CAN_TX_RX_TEST = 913,
    TM_CAN_TX_RX_TEST = 913,
    
    TC_SPI_ADXL345_TEST = 914,
    TM_SPI_ADXL345_TEST = 914,

    TC_GPS_GET_3D_POSITION_VELOCITY = 950,
    TM_GPS_GET_3D_POSITION_VELOCITY = 950, // Cartesian position and velocity

    TC_GPS_COMPUTE_TLE = 951,
    TM_GPS_COMPUTE_TLE = 951, // Cartesian position and velocity

    TC_GPS_GET_LOCATION_INFO = 952,
    TM_GPS_GET_LOCATION_INFO = 952,

    TC_GPS_GET_NMEA_GPGGA=953,
    TM_GPS_GET_NMEA_GPGGA=953, //gga

    TC_GPS_GET_NMEA_GPRMC=954,
    TM_GPS_GET_NMEA_GPRMC=954, //rmc

    TC_GPS_GET_DATE_TIME=955,
    TM_GPS_GET_DATE_TIME=955, //zda

    TC_SET_GPS_TIME_SYNC_PRDCTY = 956,
    TM_SET_GPS_TIME_SYNC_PRDCTY = 956,

    TC_GET_GPS_TIME_SYNC_PRDCTY = 957,
    TM_GET_GPS_TIME_SYNC_PRDCTY = 957,

    TC_SYNC_GPS_TIME = 958,
    TM_SYNC_GPS_TIME = 958,

    TC_GPS_GET_GPS_TIME = 959,
    TM_GPS_GET_GPS_TIME = 959,

    TC_SET_SDR_CFG=850,
    TC_GET_SDR_CFG,
    TC_SET_SDR_STS,
    TC_GET_SDR_STS,
    TC_SET_SDR_TMR_CFG,
    TC_GET_SDR_TMR_CFG,
    TC_SET_SDR_RX_RSSI_CFG,
    TC_GET_SDR_RX_RSSI_CFG,
    TC_SET_SDR_TM_CFG,
    TC_GET_SDR_TM_CFG,
    TC_SET_SDR_SENS_CFG,
    TC_GET_SDR_SENS_CFG,
    TC_SET_SDR_OVER_RULE_CFG,
    TC_GET_SDR_OVER_RULE_CFG,
    TC_SET_SDR_SCH_BEACON_CFG,
    TC_GET_SDR_SCH_BEACON_CFG,

    TM_SET_SDR_CFG=850,
    TM_GET_SDR_CFG,
    TM_SET_SDR_STS,
    TM_GET_SDR_STS,
    TM_SET_SDR_TMR_CFG,
    TM_GET_SDR_TMR_CFG,
    TM_SET_SDR_RX_RSSI_CFG,
    TM_GET_SDR_RX_RSSI_CFG,
    TM_SET_SDR_TM_CFG,
    TM_GET_SDR_TM_CFG,
    TM_SET_SDR_SENS_CFG,
    TM_GET_SDR_SENS_CFG,
    TM_SET_SDR_OVER_RULE_CFG,
    TM_GET_SDR_OVER_RULE_CFG,
     TM_SET_SDR_SCH_BEACON_CFG,
     TM_GET_SDR_SCH_BEACON_CFG,

    TC_GET_PS_TEMP=610,
    TM_GET_PS_TEMP=610,

    TC_GET_PS_TIME=611,
    TM_GET_PS_TIME=611,

    TC_GET_MCU_CHIP_INFO=612,
    TM_GET_MCU_CHIP_INFO=612,
   
    TC_GET_MCU_EXT_MEM_INFO=613,
    TM_GET_MCU_EXT_MEM_INFO=613,

//    TC_GET_MCU_INT_PHERIPHARL_INFO=614,
//    TM_GET_MCU_INT_PHERIPHARL_INFO=614,

    TC_GET_MCU_EXT_PHERIPHARL_INFO=615,
    TM_GET_MCU_EXT_PHERIPHARL_INFO=615,

TC_GET_MCU_RST_INFO=616,
    TM_GET_MCU_RST_INFO=616,

    TC_GET_MCU_INT_MEM_INFO=617,
    TM_GET_MCU_INT_MEM_INFO=617,

TC_GET_MCU_INT_PHERIPHARL_INFO=618,
    TM_GET_MCU_INT_PHERIPHARL_INFO=618,

	TC_SET_CONTROL_FLAG_TM_BUFFER=619,
	TM_SET_CONTROL_FLAG_TM_BUFFER=619,

	TC_SET_COMMS_TM_DLREQ=620,
        TM_SET_COMMS_TM_DLREQ=620,
        
        TC_GET_HEALTH_METRICS=621,
        TM_GET_HEALTH_METRICS=621,

        TC_CHNGE_QUEUE_PRIORITY=622,
        TM_CHNGE_QUEUE_PRIORITY=622,

        TC_CHNGE_MODULE_PRIORITY=623,
        TM_CHNGE_MODULE_PRIORITY=623,

        TC_PRINT_MEM_LEAK=624,
        TM_PRINT_MEM_LEAK=624,

        TC_HM_TEST_CASE_REQ= 4000,
        TM_HM_TEST_CASE_REQ= 4000,

    TC_TM_MAX_ID = 5000,

        TC_THRUSTER_SET_MODE = 1000,
        TM_THRUSTER_SET_MODE = 1000,

        TC_THRUSTER_GET_MODE = 1001,
        TM_THRUSTER_GET_MODE = 1001,

        TC_THRUSTER_SET_FIRING_DURATION = 1002,
        TM_THRUSTER_SET_FIRING_DURATION = 1002,

        TC_THRUSTER_GET_FIRING_DURATION = 1003,
        TM_THRUSTER_GET_FIRING_DURATION = 1003,

        TC_THRUSTER_GET_INPUT_POWER_CONSMP = 1004,
        TM_THRUSTER_GET_INPUT_POWER_CONSMP = 1004,

        TC_THRUSTER_SET_RADIATOR_TEMP_LIMIT = 1005,
        TM_THRUSTER_SET_RADIATOR_TEMP_LIMIT = 1005,

        TC_THRUSTER_GET_RADIATOR_TEMP_LIMIT = 1006,
        TM_THRUSTER_GET_RADIATOR_TEMP_LIMIT = 1006,

        TC_THRUSTER_SET_TANK_PRESSURE_LIMIT = 1007,
        TM_THRUSTER_SET_TANK_PRESSURE_LIMIT = 1007,

        TC_THRUSTER_GET_TANK_PRESSURE_LIMIT = 1008,
        TM_THRUSTER_GET_TANK_PRESSURE_LIMIT = 1008,
 
        TC_THRUSTER_GET_REMAINING_PROPELLANT = 1009,
        TM_THRUSTER_GET_REMAINING_PROPELLANT = 1009,

        TC_THRUSTER_GET_ONBOARD_TEMPERATURE = 1010,
        TM_THRUSTER_GET_ONBOARD_TEMPERATURE = 1010,

  /*      TC_THRUSTER_GET_ACTIVE_STATUS = 1011,
        TM_THRUSTER_GET_ACTIVE_STATUS = 1011,*/

}tc_tm_id_e;


/**
 * @brief task ID enumeration
 */
typedef enum
{
    OS_TIMER,
    CSP_TASK,
    CSP_TASK1,
    CSP_TASK2,
    CSP_TASK3,
    CSP_ETH_RX,
    ETHERNET_TASK,
    USB_TASK,
    UART_EDGE_CONTROLLER,
    EPS_TASK,
    LWIP_MBOX_TASK,
    LWIP_TASK,
	SDR_APP,
    COMMS_RX,
    COMMS_SBAND_CTLR,
    COMMS_UHF_CTLR,
    COMMS_SBAND_IQ,
    COMMS_SBAND_TX,
    COMMS_TX,
    COMMS_XBAND_CTLR,
    ORBIT_CONOPS_SCHEDULER,
    ADCS_SERVER_THREAD,
    ADCS_CONTROLLER,
    ADCS_EVENT_THREAD,
    TC_TM_MANAGER_IPC_RECEIVE,
    TC_TM_MANAGER_IPC_SEND,
    TM_STORAGE,
    OBC_MAIN,
    FTM_FSM_HANDLER,
    FTM_TCTM_RCV,
    FTM_TCTM_SEND,
    OBC_IPCC_RECEIVE,
    OBC_IPCC_SEND,
    IO_THREAD,
    OBC_OTSU,
    OBC_MEMCPY_THREAD,
    DEBUG_LOGGER,
    LOGGER_TRACE,
    ERR_HANDLER,
    HM_MANAGER_IPC_RECEIVE,
#ifdef TEST_LAYER
    TEST_TASK,
#endif
    IDLE_TASK,
    OBC_MEM_DEBUG_TC,
    OBC_SENSOR_HDLR,
    HAL_INTR_HDLR,
    PLD_SRV_TASK,
    GPS_TASK,
#if 0
    THREAD_TX_1,
    THREAD_TX_2,
    THREAD_TX_3,
    THREAD_TX_4,
#endif

    SPI_TO_UART_RCV_TASK,
    SPI_TO_UART_TRANS_TASK,
    SPI_TO_UART_CALLBACK_TASK,

#ifdef LINUX_TEMP_PORT
    OBC_SNS_SIMU,
#endif
#ifdef EPS_SIMU_ENABLE
    OBC_EPS_SIMU,
#endif

#if (PERIODIC_LOG_ENB == 1) || defined(ENABLE_SOC_PRINT)
    OBC_LOGGER_SOCKET,
#endif
    OS_TASK_MAX

}e_exo_task_id;

/**
 * @brief OBC health metric buffer info
 * Periodicity every 1min
 * Buffer size = sizeof(s_obc_health_info)*90*3
 *
 */
typedef struct
{
    /** Timestamp*/
    uint64_t timestamp;

    /** FSM current state */
    uint8_t fsm_state;

    /** No of OBC resets */
    uint8_t num_resets;

    /** IO errors */
    uint16_t io_err;

    /** System errors */
    uint8_t sys_err;

    /** CPU Utilization*/
    float cpuUtil;

    /** Remaining iram memory info*/
    uint32_t iram_rem_heap;


    /** Remaining eram memory info*/
    uint32_t eram_rem_heap;

    /** OBC uptime */
    uint32_t uptime;

    /** System reset cause */
    uint8_t reset_cause;

     /** IPC  fail counter **/
    uint16_t ipc_fail_cntr[OS_TASK_MAX];

}__attribute__((__packed__))s_obc_health_info;

/**
 * @brief Sensor information queue id
 */
typedef enum
{
        OBC_DATA_QUEUE_ID,
        OBC_QUEUE_ID_MAX
}obc_queue_id;

/**
 * @brief SBAND buffered TM information queue id
 */
typedef enum
{
	SBAND_PERIODIC_TM_QUEUE_ID,
        SBAND_TM_MAX_QUEUE_ID
}sband_buff_fw_queue_id;

/**
 * @brief UHF buffered TM information queue id
 */
typedef enum
{
	UHF_TM_PROP_QUEUE_ID,
        UHF_TM_MAX_QUEUE_ID
}uhf_buff_fw_queue_id;

/*
 * @brief application enum for buffering FW
 */
typedef enum {
    TC_TM_BUFFER_APP_EPS,
    TC_TM_BUFFER_APP_ADCS,
    TC_TM_BUFFER_APP_COMMSS_SBAND,
    TC_TM_BUFFER_APP_COMMSS_UHF,
    TC_TM_BUFFER_APP_SENSOR,
    TC_TM_BUFFER_APP_OBC,
    TC_TM_BUFFER_APP_ERR_HDLR,
#ifdef TEST_LAYER
    TC_TM_BUFFER_TEST_TASK,
#endif
    TC_TM_BUFFER_APP_MAX,
}e_tc_buffer_apps;

typedef enum
{
        SDR_ERR = -1,
        SDR_APP_NO_ACTION,
        SDR_APP_SUCCESS,
        SDR_SET_TMR_SUCCESS,
        SDR_RX_RSSI_SUCCESS,
        SDR_SET_TM_SUCCESS,
        SDR_GET_CFG_SUCCESS,
        SDR_GET_STS_SUCCESS,
        SDR_GET_TMR_SUCCESS,
        SDR_GET_RX_RSSI_SUCCESS,
        SDR_GET_TM_SUCCESS,
        SDR_SET_SENS_SUCCESS,
        SDR_GET_SENS_SUCCESS,
        SDR_SET_OVER_RULE_SUCCESS,
        SDR_SET_OVER_RULE_FAIL,
        SDR_GET_OVER_RULE_SUCCESS,
        SDR_SET_GPASS_SUCCESS,
        SDR_SET_GPASS_FAIL,
        SDR_GET_GPASS_SUCCESS,
        SDR_GET_GPASS_FAIL

}e_sdr_app_ret_ts;

/**
 * @brief IPC/ITC message ID enumeration
 */
typedef enum
{
EPS_OBC_DEV_STS_IND = TC_TM_MAX_ID,
	EPS_OBC_BAT_STS_IND,
	EPS_SDR_APP_MH_RSP,
	OBC_EPS_DEV_STS_RSP,
	OBC_EPS_HEALTH_CHECK_REQ,
	OBC_SBAND_INIT_REQ,  /* INIT refers to resume state */
	OBC_SBAND_DEINIT_REQ,/* DEINIT refers to suspend state */
	OBC_SBAND_HEALTH_CHECK_REQ,
	OBC_SBAND_DL_HEALTH_REQ,
	OBC_XBAND_INIT_REQ,
	OBC_XBAND_DEINIT_REQ,
	OBC_XBAND_IPCC_RCV_RSP,
	OBC_UHF_INIT_REQ,  /* INIT refers to resume state */
	OBC_UHF_DEINIT_REQ,/* DEINIT refers to suspend state */
	OBC_UHF_HEALTH_CHECK_REQ,
	OBC_ADCS_INIT_REQ,
	OBC_ADCS_DEINIT_REQ,
	OBC_ADCS_GPS_INIT_IND,
	OBC_ADCS_GPS_DEINIT_IND,
	OBC_ADCS_THRUST_INIT_IND,
	OBC_ADCS_THRUST_DEINIT_IND,
	OBC_ADCS_HEALTH_CHECK_REQ,
	OBC_ADCS_PERIODIC_CB,
	OBC_PLD_SERVER_INIT_REQ,
	OBC_PLD_SERVER_DEINIT_REQ,
	OBC_OTSU_INIT_REQ,
	OBC_OTSU_DEINIT_REQ,
	OBC_OTSU_SHUTDOWN_RSP,
	OBC_FTP_INIT_REQ,
	OBC_FTP_DEINIT_REQ,
	OBC_TC_TM_INIT_REQ,
	OBC_TC_TM_DEINIT_REQ,
        OBC_TC_TM_BUFFER_REQ,
        OBC_TC_TM_BUFFER_RSP,
        OBC_TC_TM_ENQUEUE_REQ,
        OBC_TC_TM_ENQUEUE_RSP,
        OBC_TC_TM_ENQUEUE_FRONT_REQ,
        OBC_TC_TM_ENQUEUE_FRONT_RSP,
        OBC_TC_TM_DL_BUFFER_REQ,
        OBC_TC_TM_DL_BUFFER_RSP,
        OBC_TC_TM_FLUSH_QUEUE_REQ,
        OBC_TC_TM_FLUSH_QUEUE_RSP,
        OBC_TC_TM_QUEUE_RESIZE_REQ,
        OBC_TC_TM_QUEUE_RESIZE_RSP,
        OBC_TC_TM_CHNG_QUEUE_PRIORITY_REQ,
        OBC_TC_TM_CHNG_QUEUE_PRIORITY_RSP,
        OBC_TC_TM_DEL_QUEUE_REQ,
        OBC_TC_TM_DEL_QUEUE_RSP,
        OBC_TC_TM_CHNG_SUB_MOD_PRIORITY_REQ,
        OBC_TC_TM_CHNG_SUB_MOD_PRIORITY_RSP,
	OBC_SCH_INIT_REQ,
	OBC_SCH_DEINIT_REQ,
	OBC_SCH_INIT_SYNC_TIME_REQ,
	OBC_SCH_STOP_SYNC_TIME_REQ,
	OBC_ZES_INIT_REQ,
	OBC_ZES_DEINIT_REQ,
	OBC_SEN_INIT_REQ,
	OBC_SEN_DEINIT_REQ,
	OBC_SEN_HEALTH_CHECK_REQ,
	OBC_SDR_APP_MH_RSP,
	OBC_SDR_APP_BAT_CH_IND,
	SBAND_SDR_APP_BAT_STS_REQ,
	UHF_SDR_APP_BAT_STS_REQ,
	SDR_APP_OBC_MH_REQ,
	SDR_APP_EPS_MH_REQ,
	SDR_APP_ADCS_MH_REQ,
	SDR_APP_SEN_MH_REQ,
	SDR_APP_GPS_MH_REQ,
	SDR_APP_SBAND_MH_REQ,
	SDR_APP_UHF_MH_REQ,
	SDR_APP_SDR_CTRL_SDR_CFG_REQ,
	SDR_APP_SDR_CTRL_MODE_CFG_REQ,
	SDR_APP_SDR_CTRL_TMR_CFG_REQ,
	SDR_APP_SDR_CTRL_RSSI_CFG_REQ,
	SDR_APP_SDR_CTRL_TM_CFG_REQ,
        SDR_APP_SDR_CTRL_SENS_CFG_REQ,
	SDR_APP_SBAND_BEACON_DATA_IND,
	SDR_APP_UHF_BEACON_DATA_IND,
	SDR_APP_UHF_FW_CFG_START_REQ,
	SDR_APP_UHF_FW_CFG_STOP_REQ,
        SDR_APP_SDR_CTRL_GPASS_CFG,	
  
	SBAND_SDR_APP_MH_RSP,
	UHF_SDR_APP_MH_RSP,
	SDR_CTRL_SDR_APP_SDR_CFG_RSP,
	SDR_CTRL_SDR_APP_MODE_CFG_RSP,
	SDR_CTRL_SDR_APP_TMR_CFG_RSP,
	SDR_CTRL_SDR_APP_RSSI_CFG_RSP,
	SDR_CTRL_SDR_APP_TM_CFG_RSP,
	SDR_CTRL_SDR_APP_SENS_CFG_RSP,
	SBAND_OBC_INIT_RSP,
	SBAND_OBC_DEINIT_RSP,
	SBAND_OBC_ERROR_IND,
	SBAND_OBC_GROUND_SYNC_IND,
	SBAND_OBC_HEALTH_CHECK_REQ,
	SBAND_TC_TM_ST_REQ,
	SBAND_TC_TM_STOP_REQ,
	SBAND_TC_TM_TX_CMPLT,
	SBAND_OTSU_PING_CMPLT,
	SBAND_INIT_SYNC_TIMER_EXP,
	SBAND_TX_PERIODIC_BEACON_TMR_EXP,
	SBAND_IQS_TX_WIN_OFF,
        SBAND_REINIT_TMR_EXP,
	SBAND_TM_PERIODIC_READ,
	SBAND_RX_ON_TIMER_EXP,
	SBAND_SDR_APP_BEACON_DATA_REQ,
	SBAND_PROD_KEY_UPD_REQ,
	SBAND_FW_CFG_REQ,
	SBAND_FW_CFG_START_REQ,
	SBAND_FW_CFG_STOP_REQ,
	SBAND_FW_CFG_UPD_IND,
	SBAND_FW_CFG_END_IND,
	UHF_OBC_INIT_RSP,
	UHF_OBC_DEINIT_RSP,
	UHF_OBC_ERROR_IND,
	UHF_OBC_GROUND_SYNC_IND,
	UHF_OBC_HEALTH_CHECK_REQ,
	UHF_TC_TM_ST_REQ,
	UHF_TC_TM_STOP_REQ,
	UHF_TC_TM_TX_CMPLT,
	UHF_OTSU_PING_CMPLT,
	UHF_TX_PERIODIC_BEACON_TMR_EXP,
	UHF_UART_CMD_RSP,
	UHF_UART_CMD_RSP_TIMEOUT,
	UHF_TM_PERIODIC_READ,
	UHF_RX_SHORT_TIMER_EXP,
	UHF_RX_LONG_TIMER_EXP,
	UHF_SDR_APP_BEACON_DATA_REQ,
	UHF_FW_CFG_START_REQ,
	UHF_FW_CFG_STOP_REQ,
	UHF_FW_CFG_UPD_IND,
	UHF_FW_CFG_END_IND,
	XBAND_OBC_INIT_RSP,
	XBAND_OBC_DEINIT_RSP,
	XBAND_OBC_ERROR_IND,
	XBAND_OBC_IPCC_SEND_REQ,
	ADCS_OBC_INIT_RSP,
	ADCS_OBC_DEINIT_RSP,
	ADCS_OBC_ERROR_IND,
	ADCS_SDR_APP_MH_RSP,
	PLD_SERVER_OBC_INIT_RSP,
	PLD_SERVER_OBC_DEINIT_RSP,
	PLD_SERVER_OBC_ERROR_IND,
	OTSU_OBC_INIT_RSP,
	OTSU_OBC_DEINIT_RSP,
	OTSU_OBC_ERROR_IND,
	OTSU_OBC_SHUTDOWN_REQ,
	OTSU_SBAND_FW_IND,
	OTSU_SBAND_SYNC_REQ,
	OTSU_UHF_FW_IND,
	OTSU_UHF_SYNC_REQ,
	TC_TM_OBC_INIT_RSP,
	TC_TM_OBC_DEINIT_RSP,
	TC_TM_OBC_ERROR_IND,
	TC_TM_SBAND_ST_RSP,
	TC_TM_SBAND_STOP_RSP,
	TC_TM_UHF_ST_RSP,
	TC_TM_UHF_STOP_RSP,
	SCH_OBC_INIT_RSP,
	SCH_OBC_DEINIT_RSP,
	SCH_OBC_ERROR_IND,
	SCH_OBC_INIT_SYNC_TIME_RSP,
	SCH_SBAND_GS_ST_IND,
	SCH_SBAND_GS_STOP_IND,
	SCH_UHF_GS_ST_IND,
	SCH_UHF_GS_STOP_IND,
	SEN_OBC_INIT_RSP,
	SEN_OBC_DEINIT_RSP,
	SEN_SDR_APP_MH_RSP,

	TM_STORAGE_FLUSH_REQ,
	SBAND_TX_PERIODIC_TIMER_EXP,
	UHF_TX_PERIODIC_TIMER_EXP,
	UHF_INIT_SYNC_TIMER_EXP,

	EPS_FW_UPT_TC,
	//OTSU
	OTSU_INIT_STATE,
	OTSU_TCTM_SERVICE,
	OTSU_FW_DWNLD,
	OTSU_INTEG_TEST,
	OTSU_GS_SYNC_RCV,
	OTSU_GS_SYNC_TIMEOUT_SCH,
	OTSU_SCHBOOT_TIMEOUT_SCH,
	OTSU_START_SHUTDOWN_PROC,
	OTSU_OBC_HANDSHAKE_DONE,
	OTSU_INITIATE_FW_UPDATE,
	OTSU_FALLBACK_CORRUPT_TEST,
	OTSU_GS_SOFT_RESET_RQST,
	OTSU_GS_CONTACT_TIMER_CALBACK_SERVICE,
	OTSU_SCHBOOT_TIMEOUT_BYOTSU,
	OTSU_INVALID_STATE,

	ERR_HANDLER_ITC_MSG_ERROR,
	ERR_HANDLER_ITC_MSG_ERRCLR,
	ERR_HANDLER_ITC_MSG_TCTM,
	ERR_HANDLER_ITC_MSG_PERIODIC_FAULT,
	COMMS_STORAGE_TM_DLREQ,
	GPS_LOC_NTF_TMR_EXPRY,
	GPS_TLE_NTF_TMR_EXPRY,
	GPS_SDR_APP_MH_RSP,
	GPS_COMPUTE_TLE_RSP,

	TC_SCH_LUT_TC_TRIG,
	TC_SCH_PS_TRIG,
        ADCS_SCH_COMMAND,
        ADCS_SCH_FALLBACK,

        EPS_SET_CHNL_STATE

}e_ipc_msg_id;

typedef struct
{
    uint8_t dev_id;
    uint8_t temp;
}ps_get_temp_s;

typedef struct
{
    uint32_t iram_tot_mem;
    uint32_t iram_used_mem;
    uint32_t iram_free_mem;
}obc_get_int_mem_s;

typedef struct
{
    uint8_t dev_id;
    uint32_t uptime;
    uint32_t epoch_time;
}ps_get_time_s;

typedef struct
{
    uint8_t dev_id;
    char processor_name[50];
    //uint8_t chip_id[2];
    uint16_t chip_id;
    uint32_t clock_speed;
    uint8_t cores;
    uint32_t cache_size;

}__attribute__((__packed__))ps_get_chip_info_s;
#if 0
typedef struct
{
    uint8_t dev_id;
    uint64_t tot_mem;
    uint64_t available_mem;
    uint64_t free_mem;
}__attribute__((__packed__))ps_get_ext_mem_s;
#endif

typedef struct
{
	uint8_t  pher_id;
	uint16_t pher_speed;
//	uint8_t  curnt_active_sts;
//	uint16_t error_count;
}__attribute__((__packed__))pher_infor_buf_s;

typedef struct
{
    //uint8_t dev_id;
    uint32_t pheripheral_cnt;
    pher_infor_buf_s pher_infor_buf[MAX_INT_PHER_CNT];
}__attribute__((__packed__))obc_get_int_pher_info_s;


typedef struct
{
    //uint8_t dev_id;
    uint32_t pheripheral_cnt;
    pher_infor_buf_s pher_infor_buf[MAX_EXT_PHER_CNT];
}__attribute__((__packed__))obc_get_ext_pher_info_s;

typedef enum
{
	MCU_CAN=0,
	MCU_SPI,
	MCU_I2C,
	MCU_UART,
	MCU_FMC,
	MCU_QSPI,
	MCU_USB
}mcu_int_pher_e;
#if 0
typedef struct
{
    uint8_t dev_id;
    uint32_t eram_tot_mem;
    uint32_t eram_used_mem;
    uint32_t flash_qspi_tot_mem;
    uint32_t flash_qspi_used_mem;
    uint32_t flash_fmc_tot_mem;
    uint32_t flash_fmc_used_mem;
}__attribute__((__packed__))obc_get_ext_mem_s;
#endif

typedef struct
{
    uint8_t adc_id;
    uint8_t adc_chnl_id;
    float adc_vltge;
}__attribute__((__packed__))adc_board_read;

typedef struct
{
    uint64_t tot_mem;
    uint64_t used_mem;
    uint64_t free_mem;
}__attribute__((__packed__))ext_mem_info_s;

typedef struct
{
    uint8_t dev_id;
    uint32_t mem_cnt;
    ext_mem_info_s ext_mem_info[3];
}__attribute__((__packed__))mcu_get_ext_mem_s;

typedef struct
{
    int day;
    int month;
    int year;
}gps_date;

typedef struct
{
    int hours;
    int minutes;
    int seconds;
    int microseconds;
}gps_time;


typedef struct
{
    uint32_t time;    //time status of the position in epoch
    bool valid;
    float latitude;
    float longitude;
    float altitude;   //Antenna altitude above/below mean sealevel in meters
    float height;   //the relationship between the geoid and the WGS84 ellipsoid in meters
    float speed;    //The speed of the GPS receiver over the ground, measured in knots.
    int satellites_tracked;

}__attribute__((__packed__)) gps_loc_info;


typedef struct orbit_s {
   /*Add the epoch time if required. */
    uint16_t ep_year; /* Year of epoch, e.g. 94 for 1994, 100 for 2000AD */
    double ep_day; /*Day of epoch from 00:00 Jan 1st ( = 1.0 ) */
    double rev; /*Mean motion, revolutions per day */
    double bstar; /*Drag term */
    double eqinc; /*Equatorial inclination, radians */
    double ecc; /*Eccentricity */
    double mnan; /*Mean anomaly at epoch from elements, radians */
    double argp; /*Argument of perigee, radians */
    double ascn; /*Right ascension (ascending node), radians */
    double smjaxs; /*Semi-major axis, km */
    uint32_t norb; /*Orbit number, for elements */
    uint16_t satno; /*Satellite number */
}__attribute__((__packed__)) orbit_tle_t;

typedef struct
{
    gps_time time;
    float latitude;
    float longitude;
    int fix_quality;
    int satellites_tracked;
    float hdop;
    float altitude;
    char altitude_units;
    float height;
    char height_units;
    float dgps_age;
}__attribute__((__packed__)) gps_location_data1; //gga

typedef struct
{
    gps_time time;
    bool valid;
    float latitude;
    float longitude;
    float speed;
    float course;
    gps_date date;
    float variation;
}__attribute__((__packed__)) gps_location_data2;  //rmc

typedef struct
{
    gps_time time;
    gps_date date;
    int hour_offset;
    int minute_offset;
}__attribute__((__packed__)) gps_time_data;  //zda

typedef struct
{
    uint32_t p_sts;
    uint32_t p_type;
    double p_x;
    double p_y;
    double p_z;
    uint32_t v_sts;
    uint32_t v_type;
    double v_x;
    double v_y;
    double v_z;
}__attribute__((__packed__)) gps_best_xyz;

typedef struct
{
    uint32_t type;
    uint32_t size;
    uint32_t periodicity;
    uint32_t pld_count;
    uint32_t node;
}comms_sync_s;

typedef struct
{
    uint8_t overrule_enb;
    uint8_t norm_radio_id;
    uint8_t safe_radio_id;
}__attribute__((__packed__)) s_tctm_rm_overrule;

typedef struct
{
    uint8_t channel_id;
    uint8_t test_mode;
    uint8_t status;   //Valid only in TM
    char data[15];
}__attribute__((__packed__)) s_test_spi_uart_conv;

typedef enum
{
    MEM_TYPE_IRAM = 0,
    MEM_TYPE_SDRAM,
    MEM_TYPE_IFLASH,
    MEM_TYPE_QSPI,
    MEM_TYPE_NOR_FLASH

}mem_type_e;

typedef enum _ahw_inst_id
{
	INVLD_AH_INST_ID ,					///< invalid AH instance ID
	MCU_ID,
	IMU_BMX160_OBC_1,					///< IMU sensor BMX160 in on-board controller
	IMU_BMX160_OBC_2,					///< IMU sensor BMX160 in on-board controller
	IMU_BMI160,							///< IMU sensor BMX160
	DT_DS620_EDGE,						///< Digital thermostat DS620 in edge board
	DT_DS620_PS,						///< Digital thermostat DS620 in payload server
	HSC_ADM1176_EDGE,					///< Hot swap controller ADM1176 in edge board
	HSC_ADM1176_PS_2,					///< Hot swap controller ADM1176 in payload server
	HSC_ADM1176_PS_1,					///< Hot swap controller ADM1176 in payload server
	TEMP_SENSOR_MCP9843_OBC,			///< Temperature sensor MCP9843 in on-board controller
	TEMP_SENSOR_MCP9843_PS,				///< Temperature sensor MCP9843 in payload server
	TEMP_SENSOR_MCP9843_EDGE,			///< Temperature sensor MCP9843 in edge board
	TEMP_SENSOR_MCP9843_GPS,			///< Temperature sensor MCP9843 in GPS
	DT_DS620_SPE01,			                ///< Digital thermostat DS620 in solar panel
	DT_DS620_SPE02,			                ///< Digital thermostat DS620 in solar panel
	DT_DS620_SPW01,		                 	///< Digital thermostat DS620 in solar panel
	DT_DS620_SPW02,               			///< Digital thermostat DS620 in solar panel
	DT_DS620_SPB01,	                		///< Digital thermostat DS620 in solar panel
	POWER_SENSE_MONITOR_OBC,			///< Power sensor INA230 in on-board controller
	POWER_SENSE_MONITOR_PS,				///< Power sensor INA230 in payload server
	GPIO_EXP_PCAL6408A_PS,				///< GPIO Expander PCAL6408A in payload server
	GPIO_EXP_MCP23008_EDGE_1,			///< GPIO Expander MCP23008 in edge board
	GPIO_EXP_MCP23008_EDGE_2,			///< GPIO Expander MCP23008 in edge board
	GPIO_EXP_MCP23008_OBC_1,			///< GPIO Expander MCP23008 in edge board
	GPIO_EXP_MCP23008_OBC_2,			///< GPIO Expander MCP23008 in edge board
	GPIO_EXP_MCP23008_GPS,				///< GPIO Expander MCP23008 in GPS
	MORPHEUS_THRUSTER,					///< Thruster sensor
	VSM_UCD9081_OBC,					///< Voltage sequence monitor UCD9081 in on-board controller
	DATA_ACQ_DVC_ADS7828,				///< Data logger ADS7828
	NOR_FLASH_MX25L512,					///< NOR Flash MX25L512 with QSPI interface
	NOR_FLASH_MT25QL512,				///< NOR Flash MT25QL512 with QSPI interface
	NOR_FLASH_S25FL512T,				///< NOR Flash S25FL512T with QSPI interface
	PARALLEL_NOR_FLASH_MT28EW128,       ///< NOR Flash S25FL512T with FMC interface
	MAX14830_SPI_TO_UART,

	MAX_AH_INST_ID
}ahw_inst_id_t;

    typedef enum
{
    OBC_TEMP_SNS_HIGH_THRSLD,
    PS_TEMP_SNS_HIGH_THRSLD,
    EDGE_TEMP_SNS_HIGH_THRSLD,
    GPS_TEMP_SNS_HIGH_THRSLD,

    OBC_TEMP_SNS_LOW_THRSLD,
    PS_TEMP_SNS_LOW_THRSLD,
    EDGE_TEMP_SNS_LOW_THRSLD,
    GPS_TEMP_SNS_LOW_THRSLD,

    OBC_PWR_SNS_HIGH_THRSLD,
    PS_PWR_SNS_HIGH_THRSLD,

    OBC_PWR_SNS_LOW_THRSLD,
    PS_PWR_SNS_LOW_THRSLD,

    SNS_THRSLD_TYPE_MAX

}sns_thrsld_sts;

/**
 * @brief  Possible STM32 system reset causes
 */
typedef enum reset_cause_e
{
    RESET_CAUSE_UNKNOWN = 0,
    RESET_CAUSE_LOW_POWER_RESET,
    RESET_CAUSE_WINDOW_WATCHDOG_RESET,
    RESET_CAUSE_INDEPENDENT_WATCHDOG_RESET,
    RESET_CAUSE_SOFTWARE_RESET,
    RESET_CAUSE_POWER_ON_POWER_DOWN_RESET,
    RESET_CAUSE_EXTERNAL_RESET_PIN_RESET,
    RESET_CAUSE_BROWNOUT_RESET,
} reset_cause_t;

/**
 * @brief API to get the reset reason name from the given reset cause
 */
char* reset_cause_get_name(uint32_t reset_cause);

typedef enum
{
    EXT_MEM_WRITE_55,
    EXT_MEM_WRITE_AA,
    EXT_MEM_WRITE_00,
    EXT_MEM_WRITE_FF,
    EXT_MEM_READ_55,
    EXT_MEM_READ_AA,
    EXT_MEM_READ_00,
    EXT_MEM_READ_FF,
    EXT_MEM_ERASE_WRITE_READ,
    EXT_MEM_ERASE,
    EXT_MEM_OPERATION_MAX,
}ext_mem_test_typ;
typedef struct
{
    uint8_t mem_intf_type;
    uint8_t block_or_fullchip;
    uint8_t test_type;
    uint8_t sts;
}ext_mem_test_tc_tm_s;


/**
 * @brief Reset reason storage unit
 */
typedef struct
{
    uint32_t reset_reason;
    time_t get_time;

}__attribute__((__packed__))rst_reason;

/**
 * @brief Reboot reason storage unit
 */
typedef struct
{
    rst_reason reset_arr[MAX_RBT_RSN_ARR];
    uint16_t rst_count;
    uint8_t arr_index;
}__attribute__((__packed__))reset_info;


typedef struct
{
   uint64_t total_mem;
   uint64_t used_mem;
   uint64_t available_mem;

}__attribute__((__packed__))iram_heap_status;

typedef struct
{
    uint64_t iram_heap_mem_total;
    uint64_t iram_heap_mem_used;
    uint64_t eram_heap_mem_total;
    uint64_t eram_heap_mem_used;
    uint64_t eflash_qspi_mem_total;
    uint64_t eflash_qspi_mem_used;
    uint64_t eflash_fmc_mem_total;
    uint64_t eflash_fmc_mem_used;
    uint64_t eram_mem_total;
    uint64_t eram_mem_used;

}__attribute__((__packed__)) sys_mem_status ;


typedef enum
{
        LUT0_GRP_STS,
        LUT1_GRP_STS,
        CRNT_STS_INFO,
        CRNT_LUT_CNTR,
        CRNT_SEG_CNT,
        CRNT_EVNT_CNT
}e_sch_lut_sts;

typedef struct err_logs_def
{
        uint8_t err_apperance_cntr;
        uint8_t recovery_success_cntr;
        uint8_t recovery_failure_cntr;
}err_logs;


typedef struct report_time_info_def
{
        uint8_t hours;
        uint8_t min;
        uint8_t seconds;
}report_time_info;

typedef struct err_handler_history_def
{
	uint64_t reported_time;
	uint8_t group_id 	        : 3;
	uint8_t error_code          : 5;
	uint8_t fault_set	        : 1;
	uint8_t reported_module_id  : 7;

}err_handler_history;

typedef enum err_tctm_request_def
{
	ERR_TCTM_GET_ALL_FAULTS,
	ERR_TCTM_ERR_CODE_STS,
	ERR_TCTM_ERR_HISTORY,
	ERR_TCTM_INVALID_INPUT
}err_tctm_request_id;


typedef struct
{
    uint8_t mode;
    uint32_t address;
    uint16_t len;
    uint8_t mem_type;
}__attribute__((__packed__))nvm_param;



typedef enum
{
    EPS_GS_GET_CONV_BRD_BUFF = 0,
    EPS_GS_GET_BTRY_BRD_BUFF,
    EPS_GS_GET_CHNL_PARM_BUFF,
    EPS_GS_GET_ALRT_BRD_BUFF
}eps_gs_get_buffer;


/**
 * @brief EPS information queue id
 */
typedef enum
{
    EPS_ALRT_FLAG_QUEUE_ID,
    EPS_BTRY_BRD_QUEUE_ID,
    EPS_CONV_BRD_QUEUE_ID,
    EPS_CHNL_PAR_QUEUE_ID,
    EPS_QUEUE_ID_MAX
}eps_hlth_queue_id;



typedef struct
{
    uint8_t state;
    time_s time;
}sch_sband_ctrl_s;

typedef struct
{
	uint8_t down_via_tm_or_ftm : 4;
    uint8_t seq_loss_enable : 1;
	uint8_t reserved : 3;
	uint16_t down_blocks;
	uint16_t down_mtu;
	uint16_t sat_ftds;
}__attribute__((__packed__))log_data;

typedef struct
{
	uint64_t   mem_address;		///> data download from memory address
	uint32_t   mem_size;        ///> size to be downloaded
	uint16_t   ftm_ftds_cfg;
	uint16_t    ftm_mtu_cfg;
	uint8_t    ftm_seq_detct_cfg;
	uint8_t    mem_type;
}__attribute__((__packed__))obc_mem_dwldr_def;

typedef struct eps_fw_data
{
    uint8_t fw_status;
    uint32_t fw_size;
    uint32_t fw_crc;
}__attribute__((__packed__))eps_fw_data_s;

typedef enum
{
        LOG_ADCS,
        LOG_OTSU,
        LOG_COMMS,
        LOG_FTM,
        LOG_OBC,
        LOG_EPS,
        LOG_TCTM,
        LOG_SCHEDULER,
        LOG_AHW,
        LOG_LOGGER,
        LOG_ERROR_HANDLER,
        LOG_HM,
        LOG_IPCC,

        LOG_MODULE_MAX

}log_module_list;

typedef struct
{
	uint8_t hour;
	uint8_t minute;
	uint8_t seconds;
	uint8_t date;
	uint8_t month;
	uint16_t year;
}__attribute__((__packed__))sys_time_date_s;

static inline void sband_on_off_state_ctrl(sch_sband_ctrl_s *value, uint8_t *size)
{
    *size = 5;

    value[0].state = 1;
    value[0].time.hour = 1;
    value[0].time.min= 3;
    value[0].time.sec = 10;

    value[1].state = 0;
    value[1].time.hour = 0;
    value[1].time.min= 2;
    value[1].time.sec = 20;

    value[2].state = 1;
    value[2].time.hour = 4;
    value[2].time.min= 6;
    value[2].time.sec = 50;

    value[3].state = 0;
    value[3].time.hour = 0;
    value[3].time.min= 6;
    value[3].time.sec = 20;

    value[4].state = 1;
    value[4].time.hour = 2;
    value[4].time.min= 20;
    value[4].time.sec = 0;
}





typedef enum
{
    e_mem_debug_sdram_test = 1,
    e_mem_debug_fmc_nor_flash,
    e_mem_debug_qspi_nor_flash,
    e_iram_heap_availablity,
    e_max_memory_type

}obc_debug_mem_type_e_1;

typedef enum
{
    INDONESIAN_BRDR_LAT = 1,
    OGS_SINGAPORE_LAT,
    MAX_ADCS_PT_LOC

}adcs_pt_info_e;

typedef enum
{
    //GENERAL EVENT
    ADCS_POINT               =  1,
    POWER_ON_PLD,
    BOOT_UP_PLD_VM,
    SHUTDOWN_PLD_VM,
    STAGED_TC,
    MAX_SCHEDULER_EVENT_ID

}scheduler_evnt_id;

typedef enum
{
	EPS_CTRL_SUCCESS 	= 0,				///< EPS control success
	EPS_CTRL_COMM_ERR 	= 1,				///< EPS control communication error
	EPS_CTRL_PARAM_ERR	= 2,				///< EPS control parameter error
	EPS_CTRL_HW_ERR		= 3,				///< EPS control HW error
	EPS_CTRL_ERR		= 4,				///< EPS control error
	EPS_CTRL_BTRY_ERR 	= 5,				///< EPS control battery error
	EPS_CTRL_IN_PROG	= 6,					///< EPS control in
	EPS_CTRL_CHNL_OVR_CUR_ERR = 8
}eps_ctrlr_err_sts_s;

typedef enum
{
    TC_PLD_HEALTH_CHK = 100,
    TC_OGS_CONTACT_OGS = 101,
    TC_OGS_CONTACT_OGS1 = 103,
    TC_SW_UPDT = 104,

    NET_ENTER_GEOFENCE = 300,
    NET_EXIT_GEOFENCE = 301,
    NET_FIRM_UPDT = 302,
    NET_DOWNLINK_LOGS = 303,
    NET_PWR_CYCLE = 304,
    NET_PASS_THR_CMD = 305,

    ZES_DBG_MODE = 401,
    ZES_FLIGHT_MODE = 402,
    ZES_FIRM_UPDT = 402,
    ZES_APP_UPDT = 403,

    SAYA_SEQA = 500,
    SAYA_SEQB = 501,

    MAX_STAGED_TC_EVNT_ID

}staged_tc_event_id;


typedef enum _icm_shut_purpose
{
    ICM_SP_SYS_SHUT = 0,
    ICM_SP_LOW_BTRY,
    ICM_SP_RST_RCVRY,
    ICM_SP_OVR_TEMP,
    ICM_SP_INVLD
}icm_shut_purpose;

/**
  * @brief  Radio Module ID type enumeration
  */
typedef enum{
    COMMS_S_BAND = 1,     ///< S Band Id
    COMMS_UHF,            ///< UHF Id
    COMMS_X_BAND,         ///< X Band Id
    MAX_RADIO_MOD         ///< Max Radio Id
}e_radio_id;

/// Adcs firmware operation status
typedef enum {
    FW_UPLOAD_SUCCESS = 0,      ///< Firmware Upload Success
    FW_UPLOAD_FAILURE = -1,     ///< Firmware Upload Failure
    FW_NOT_AVAILABLE = -2,      ///< Firmware Not Available
    FW_SDRAM_CRC_ERR = -3,      ///< Firmware SDRAM CRC Error
    FW_FMC_NOR_CRC_ERR = -3,    ///< Firmware FMC NOR CRC Error
    FW_ADCS_CRC_ERR = -4,       ///< Firmware ADCS CRC Error
    FW_ADCS_BCK_FW_UPLD_SCS = -5///< Backup firmware updated Success
}e_adcs_fw_upload_status;

typedef struct __attribute__((packed))
{
    uint8 min;
    uint8 sec;
}sch_time_s;

typedef struct __attribute__((packed))
{
    uint8 event_id;
    sch_time_s event_exec_time;
    uint32 event_arg;
}schedule_event_s;

typedef struct __attribute__((packed))
{
    uint8 date;
    uint8 month;
    uint16 year;
    uint8 orbit_lut_map[SCH_ORBIT_LUT_MAP_MAX_CNT];
}orbit_lut_cfg_s;

typedef enum
{
    SRS4_BOOT_SET_ALTERNATE,
    SRS4_BOOT_FLASH_ALTERNATE,
    SRS4_BOOT_ERASE_ALTERNATE,
    SRS4_BOOT_CHECK_ALTERNATE,
    SRS4_BOOT_VERIFY_ALTERNATE

}e_srs4_boot_opt;
typedef struct  __attribute__((packed)) 
{
    uint8_t sys_net_ip_cnt;
    uint8_t sys_net_gw_cnt;
    uint8_t sys_net_rf_ip_cnt;
    uint8_t sys_net_rf_gw_cnt;
    uint8_t     sys_net_enable;       /*!< IP stack enable                       */
    uint8_t     sys_net_en_ip[SBAND_SYS_ETH_IP_MAX_SIZE];    /*!< Ethernet IP address                   */
    uint8_t     sys_net_en_prefix;    /*!< Ethernet network prefix bits          */
    uint8_t     sys_net_en_gw[SBAND_SYS_GT_IP_MAX_SIZE];    /*!< Ethernet gateway IP address           */
    uint8_t     sys_net_rf_ip[SBAND_SYS_SPACELINK_IP_MAX_SIZE];    /*!< Spacelink IP address                  */
    uint8_t     sys_net_rf_prefix;    /*!< Spacelink network prefix bits         */
    uint8_t     sys_net_rf_gw[SBAND_SYS_SPACELINK_GT_IP_MAX_SIZE];    /*!< Spacelink gateway IP address          */
}s_comms_net_cfg;

typedef struct
{
    uint8_t crypto_key_cnt;
    uint8_t   crypto_key[SBAND_TX_CRYPTO_KEY_MAX_SIZE];     /*!< Encryption key          */
    uint8_t   crypto_encrypt;     /*!< Encrypt frames          */
    uint8_t   crypto_auth;        /*!< Add authentication tag  */
}s_comms_tx_crypto_cfg;

typedef struct 
{
    uint8_t crypto_key_cnt;
    uint8_t   crypto_key[SBAND_RX_CRYPTO_KEY_MAX_SIZE];     /*!< Decryption key         */
    uint8_t   crypto_decrypt;     /*!< Decrypt frames         */
    uint8_t   crypto_auth;        /*!< Add authentication tag */
}s_comms_rx_crypto_cfg;

typedef struct  __attribute__((packed))
{
    uint8_t   rx_cfg_afc_enable;    /*!< Enable AFC            */
    uint32_t  rx_cfg_afc_range;     /*!< AFC adjustment range  */
}s_comms_rx_afc_cfg;

typedef struct  __attribute__((packed)) 
{
    uint32_t    sys_serial;           /*!< Serial number/ID                      */
    uint32_t    sys_sw_version;       /*!< Running software version              */
    uint32_t    sys_bootcount;        /*!< Number of times the system was booted */
    uint16_t    sys_reboot;           /*!< Reboot timer                          */
}s_comms_boot_cfg;

typedef struct  __attribute__((packed)) 
{
    uint32_t    sys_gwdt_init;        /*!< GWDT timer reset value                */
    uint32_t    sys_gwdt_counter;     /*!< GWDT current counter value            */
    uint32_t    sys_gwdt_reset;       /*!< GWDT reset trigger                    */
}s_comms_gwdt_cfg;

typedef struct  __attribute__((packed)) 
{
    uint8_t sys_csp_routes_cnt;
    uint8_t     sys_csp_address;      /*!< csp address of the device             */
    uint8_t     sys_csp_routes[SBAND_CSP_ROUTE_MAX_SIZE];  /*!< csp routes in CIDR notation           */
}s_comms_csp_cfg;

typedef struct  __attribute__((packed)) 
{
    uint32_t    sys_can_rate;         /*!< CAN-bus bitrate                       */
    uint8_t     sys_can_promisc;      /*!< Accept all CSP CAN-frames             */
}s_comms_can_cfg;

typedef struct  __attribute__((packed)) 
{
    uint32_t    sys_uart_rate;        /*!< UART baudrate                         */
    uint8_t     sys_uart_multidrop;   /*!< UART multidrop mode                   */
}s_comms_uart_cfg;

/**
  * @brief comms receive TM Structure definition
  x
  */
typedef struct  __attribute__((packed))
{
    uint32_t  rx_cfg_frames;        /*!< Received frames                               */
    uint32_t  rx_cfg_detected;      /*!< Detected frames                               */
    f32       rx_cfg_rssi;          /*!< Measured RSSI                                 */
    f32       rx_cfg_freqerr;       /*!< Estimated frequency error                     */
    f32       rx_cfg_symerr;        /*!< Estimated symbol rate error                   */
    f32       rx_cfg_ebn0;          /*!< Estimated Eb/N0                               */
    uint8_t   rx_cfg_carrier_lock;  /*!< comms receive config carrier lock             */
    uint8_t   rx_frame_lock;        /*!< comms receive frame lock                      */
}s_comms_rx_tm;


/**
  * @brief comms receive TM Structure definition
  x
  */
typedef struct  __attribute__((packed))
{
    uint32_t  rx_cfg_frames;        /*!< Received frames                               */ //UDP recv frame for iqs
    uint32_t  rx_cfg_detected;      /*!< Detected frames                               */ //UDP detect frame  is same as recv frame
    f32       rx_cfg_rssi;          /*!< Measured RSSI                                 */ //update RSSI
    f32	      rx_avg_rssi;
    f32		  rx_cfg_freqerr;       /*!< Estimated frequency error                     */ //Doppler freq
    uint8_t  rx_cfg_carrier_lock;  /*!< comms receive config carrier lock             */ //sync
    uint8_t  rx_frame_lock;        /*!< comms receive frame lock                      */ //sync
    f32       rx_cfg_symerr;        /*!< Estimated symbol rate error                   */ //invalid
    f32       rx_cfg_ebn0;          /*!< Estimated Eb/N0                               */ //invalid
    uint32_t  rx_sir_min;			/*!< signal noise ratio min 					   */
    uint32_t  rx_sir_max;			/*!< signal noise ratio max					       */
    uint32_t  rx_bch_block_cnt;		/*!< rcv channel bch block count			   	   */
	uint32_t  rx_bch_err_cnt; 		/*!< rcv channel bch error count 			       */
}s_comms_rx_tm_xlink;


/**
  * @brief comms receive TM Structure definition
  x
  */
typedef struct  __attribute__((packed))
{
    uint32_t  tx_cfg_frames;         /*!< Transmitted frames                                            */
    f32       tx_cfg_pwr_fwd;        /*!< Measured forward power                                        */
    f32       tx_cfg_pwr_rfl;        /*!< Transmit the Measured reflected power                         */
}s_comms_tx_tm;


/**
  * @brief comms CSP TM Structure definition
  */
typedef struct  __attribute__((packed))
{
    uint16_t mtu;              //!< Maximum Transmission Unit of interface
    uint16_t reserved;
    uint32_t tx;               //!< Successfully transmitted packets
    uint32_t rx;               //!< Successfully received packets
    uint32_t tx_error;         //!< Transmit errors (packets)
    uint32_t rx_error;         //!< Receive errors, e.g. too large message
    uint32_t drop;             //!< Dropped packets
    uint32_t autherr;          //!< Authentication errors (packets)
    uint32_t frame;            //!< Frame format errors (packets)
    uint32_t txbytes;          //!< Transmitted bytes
    uint32_t rxbytes;          //!< Received bytes
}s_comms_csp_tm_details;


typedef struct  __attribute__((packed))
{
    s_comms_csp_tm_details csp_int[SBAND_CSP_TM_MAX_CNT];
    uint32_t csp_err_nomem      ;             /**< Not enough memory */
    uint32_t csp_err_inval      ;             /**< Invalid argument */
    uint32_t csp_err_timedout   ;             /**< Operation timed out */
    uint32_t csp_err_used       ;             /**< Resource already in use */
    uint32_t csp_err_notsup     ;             /**< Operation not supported */
    uint32_t csp_err_busy       ;             /**< Device or resource busy */
    uint32_t csp_err_already    ;             /**< Connection already in progress */
    uint32_t csp_err_reset      ;             /**< Connection reset */
    uint32_t csp_err_nobufs     ;             /**< No more buffer space available */
    uint32_t csp_err_tx         ;             /**< Transmission failed */
    uint32_t csp_err_driver     ;             /**< Error in driver layer */
    uint32_t csp_err_again      ;             /**< Resource temporarily unavailable */
    uint32_t csp_err_hmac       ;             /**< HMAC failed */
    uint32_t csp_err_xtea       ;             /**< XTEA failed */
    uint32_t csp_err_crc32      ;             /**< CRC32 failed */
    uint32_t csp_err_sfp        ;             /**< SFP protocol error or inconsistency */
}s_comms_csp_tm;


/**
  * @brief comms telemetric details in Structure definition
  *
  */
typedef struct
{
    int16_t  temp_psu;   /*!< Power conversion temperature */
    int16_t  temp_mcu;   /*!< MCU package temperature      */
    int16_t  temp_fpga;  /*!< FPGA temperature             */
    int16_t  temp_xcvr;  /*!< Transceiver temperature      */
    int16_t  temp_lna;   /*!< LNA temperature              */
    int16_t  temp_pa;    /*!< PA temperature               */
    uint16_t volt_vin;   /*!< Input voltage                */
    uint16_t volt_3v3;   /*!< 3.3 V rail voltage           */
    uint16_t volt_1v8;   /*!< 1.8 V rail voltage           */
    uint16_t volt_1v0;   /*!< 1.0 V rail voltage           */
    uint16_t volt_pa;    /*!< PA voltage                   */
    int16_t  cur_vin;    /*!< Input current                */
    int16_t  cur_3v3;    /*!< 3.3 V rail current           */
    int16_t  cur_1v8;    /*!< 1.8 V rail current           */
    int16_t  cur_1v0;    /*!< 1.0 V rail current           */
    int16_t  cur_pa;     /*!< PA current                   */
    uint16_t power_vin;  /*!< Input power                  */
    uint16_t power_3v3;  /*!< 3.3 V rail power             */
    uint16_t power_1v8;  /*!< 1.8 V rail power             */
    uint16_t power_1v0;  /*!< 1.0 V rail power             */
    uint16_t power_pa;   /*!< PA power                     */
	uint16_t rsvd;
}s_comms_tm_prop;


/**
  * @brief comms telemetric details in Structure definition
  * 398
  */
typedef struct
{
    int32_t  temp_mcu;   /*!< MCU package temperature      */ //eth phy
    int32_t  temp_fpga;  /*!< FPGA temperature             */ //zynq
    int32_t  temp_xcvr;  /*!< Transceiver temperature      */ //AD9361
    int32_t  temp_resrv1;   /*!< LNA temperature              */
    int32_t  temp_resrv2;    /*!< PA temperature               */
    int32_t  temp_resrv3;   /*!< Power conversion temperature */
    double   volt_vint;   /*!< Input voltage                *///VCCINT
    double   volt_vaux;   /*!< 3.3 V rail voltage           */
    double   volt_vbram;   /*!< 1.8 V rail voltage           */
    double   volt_vpint;   /*!< 1.0 V rail voltage           */
    double   volt_vpaux;    /*!< PA voltage                   */
    double   volt_vpdro;    /*!< Input current                */
    int16_t  cur_resrv1;    /*!< 3.3 V rail current           */
    int16_t  cur_resrv2;    /*!< 1.8 V rail current           */
    int16_t  cur_resrv3;    /*!< 1.0 V rail current           */
    int16_t  cur_resrv4;     /*!< PA current                   */
    uint16_t power_resrv1;  /*!< Input power                  */
    uint16_t power_resrv2;  /*!< 3.3 V rail power             */
    uint16_t power_resrv3;  /*!< 1.8 V rail power             */
    uint16_t power_resrv4;  /*!< 1.0 V rail power             */
    uint16_t power_resrv5;   /*!< PA power                     */
    uint16_t rsvd;
}s_comms_tm_prop_xlink;

typedef struct  __attribute__((packed))
{
    int32_t  temp_mcu;   /*!< MCU package temperature      */ //eth phy
    int32_t  temp_fpga;  /*!< FPGA temperature             */ //zynq
    int32_t  temp_xcvr;  /*!< Transceiver temperature      */ //AD9361
    double   volt_vint;   /*!< Input voltage                *///VCCINT
    double   volt_vaux;   /*!< 3.3 V rail voltage           */
    double   volt_vbram;   /*!< 1.8 V rail voltage           */
    double   volt_vpint;   /*!< 1.0 V rail voltage           */
    double   volt_vpaux;    /*!< PA voltage                   */
    double   volt_vpdro;    /*!< Input current                */
}s_sband_cmn_tm;



typedef struct  __attribute__((packed))
{
    uint32_t  rx_cfg_frames;        /*!< Received frames                               */ //UDP recv frame for iqs
    uint32_t  rx_cfg_detected;      /*!< Detected frames                               */ //UDP detect frame  is same as recv frame
    f32       rx_cfg_rssi;          /*!< Measured RSSI                                 */ //update RSSI
	f32       rx_avg_rssi; 			/*|< Avg RSSI									   */
    int32     rx_cfg_freqerr;       /*!< Estimated frequency error                     */ //Doppler freq
    uint32_t  rx_cfg_carrier_lock;  /*!< comms receive config carrier lock             */ //sync
    uint32_t  rx_frame_lock;        /*!< comms receive frame lock                      */ //sync
    uint32_t  rx_sir_min;			/*!< signal noise ratio min 					   */
    uint32_t  rx_sir_max;			/*!< signal noise ratio max					       */
    uint32_t  rx_bch_block_cnt;		/*!< rcv channel bch block count			   	   */
    uint32_t  rx_bch_err_cnt; 		/*!< rcv channel bch error count 			       */
}s_sband_rx_tm;

typedef struct  __attribute__((packed))
{
    uint32_t  tx_cfg_frames;         /*!< Transmitted frames                           */ // UDP tx frame for iqs
    f32       tx_cfg_pwr_rfl;        /*!< Transmit the Measured reflected power        */ //reverse calc att for iqs
}s_sband_tx_tm;


#define MAX_RX_CH 2
/***
**
**/
typedef struct  __attribute__((packed))
{
    s_sband_cmn_tm cmn_tm;
    s_sband_rx_tm rx_tm[MAX_RX_CH];
    s_sband_tx_tm tx_tm;
}s_sband_periodic_tm;

typedef struct __attribute__((packed))
{
        uint64_t  time_stamp;
        s_sband_periodic_tm comms_sband_tm_stor;
}s_comms_sband_get_tm_prop_time;

#define MAX_SBAND_PERIODIC_TM 32
typedef struct __attribute__((packed))
{
    uint8_t cnt_hk_id;
    s_comms_sband_get_tm_prop_time sband_tm_store[MAX_SBAND_PERIODIC_TM];

} s_sband_periodic_get_tm;

/**
  * @brief comms transmit configuration Structure definition
  *
  */
typedef struct  __attribute__((packed)){

    uint32_t  tx_cfg_freq;           /*!< Transmit frequency                                            */
    uint8_t   tx_cfg_type;           /*!< Transmit modulation type (0 = BPSK, 1 = QPSK, 2 = 8PSK)       */
    uint32_t  tx_cfg_rate;           /*!< Transmit symbol rate                                          */
    uint8_t   tx_cfg_rolloff;        /*!< RRC roll-off (0 = 0.20,  1 = 0.25,  2 = 0.35)                 */
    f32       tx_cfg_pout;           /*!< Transmit power                                                */
    uint8_t   tx_cfg_alc_mode;       /*!< Automatic Level Control mode (0 = open-loop, 1 = closed-loop) */
    uint8_t   tx_cfg_rs;             /*!< Enable Reed-Solomon coding                                    */
    uint8_t   tx_cfg_cc;             /*!< Enable convolutional coding                                   */
    uint8_t   tx_cfg_rand;           /*!< Enable randomization                                          */
    uint8_t   tx_cfg_crc;            /*!< Enable CRC checksum                                           */
    uint16_t  tx_cfg_idletime;       /*!< Active transmitter time after each frame                      */
    uint16_t  tx_cfg_size;           /*!< Maximum payload size                                          */
    uint16_t  tx_cfg_id;             /*!< Satellite ID/address                                          */
    s_comms_tx_crypto_cfg crypto_cfg;

    uint8_t   tx_cfg_pa_templimit;   /*!< PA temperature limit                                          */
    uint32_t  tx_cfg_frames;         /*!< Transmitted frames                                            */
    f32       tx_cfg_pwr_fwd;        /*!< Measured forward power                                        */
    f32       tx_cfg_pwr_rfl;        /*!< Transmit the Measured reflected power                         */
}s_comms_tx_cfg;


/**
  * @brief comms receive configuration Structure definition
  *
  */
typedef struct  __attribute__((packed))
{
    uint32_t  rx_cfg_freq;          /*!< Receive frequency                             */
    uint8_t   rx_cfg_type;          /*!< Receive modulation type (0 = BPSK,  1 = QPSK) */
    uint32_t  rx_cfg_rate;          /*!< Receive symbol rate                           */
    uint8_t   rx_cfg_rolloff;       /*!< RRC roll-off (0 = 0.20, 1 = 0.25, 2 = 0.35)   */
    s_comms_rx_afc_cfg afc_cfg;
    uint8_t   rx_cfg_rs;            /*!< Enable Reed-Solomon coding                    */
    uint8_t   rx_cfg_cc;            /*!< Enable convolutional coding                   */
    uint8_t   rx_cfg_rand;          /*!< Enable randomization                          */
    uint8_t   rx_cfg_crc;           /*!< Enable CRC checksum                           */
    uint16_t  rx_cfg_size;          /*!< Maximum payload size                          */
    uint16_t  rx_cfg_id;            /*!< Satellite ID/address                          */
    s_comms_rx_crypto_cfg crypto_cfg;
    uint32_t  rx_cfg_frames;        /*!< Received frames                               */
    uint32_t  rx_cfg_detected;      /*!< Detected frames                               */
    f32       rx_cfg_rssi;          /*!< Measured RSSI                                 */
    f32       rx_cfg_freqerr;       /*!< Estimated frequency error                     */
    f32       rx_cfg_symerr;        /*!< Estimated symbol rate error                   */
    f32       rx_cfg_ebn0;          /*!< Estimated Eb/N0                               */
    uint8_t   rx_cfg_carrier_lock;  /*!< comms receive config carrier lock             */
    uint8_t   rx_frame_lock;        /*!< comms receive frame lock                      */
}s_comms_rx_cfg;



/**
  * @brief comms system details in Structure definition
  *
  */
typedef struct  __attribute__((packed))

{
    uint8_t sys_name_cnt;
    uint8_t     sys_name[SBAND_SYS_NAME_MAX_SIZE];         /*!< system String name for system         */
    s_comms_boot_cfg boot_cfg;
    s_comms_gwdt_cfg gwdt_cfg;
    s_comms_csp_cfg csp_cfg;
    s_comms_can_cfg can_cfg;
    s_comms_uart_cfg uart_cfg;
    s_comms_net_cfg net_cfg;
}s_comms_sys_cfg;


typedef struct
{
    /* uint32 WordBoundary [0] */
    uint32 Crc16			:16;		//!< Crc16 checksum							--> default 0x0815
    //uint32 TxSampFact		:10;		//!< Factor for the TxSymbol (Sample) Frequency with 256.000Hz Base (3...218 -> 768.000...55.808.000Hz)
    uint32 Reserve_0	        	:10;		//!< Reserve Bits, previously TxSampFact
    uint32 MoreXmtMod	        	: 1;		//!< the use of Xmt Modulations 8-, 16-, 32- and 64PSK is allowed
    uint32 XmtOffsetMod		: 1;		//!< the use of Xmt Offset Modulation is allowed (only QPSK)
    uint32 RsMode			: 4;		//!< the use of this CCSDS reed Solomon Encoder is allowed; one of the 12 different Types or ALL(0xF) selectable

    /* uint32 WordBoundary [1] */
    uint32 XmtCh0_En	        	: 1;		//!< the use of Xmt channel 0 is allowed
    uint32 XmtCh1_En	        	: 1;		//!< the use of Xmt channel 1 is allowed
    uint32 RcvCh0_En	        	: 1;		//!< the use of Rcv channel 0 is allowed
    uint32 RcvCh1_En	        	: 1;		//!< the use of Rcv channel 1 is allowed
    uint32 RcvCh0_GainMax		: 1;		//!< the use of Rcv channel 0 RxGainMax is selectable
    uint32 RcvCh1_GainMax		: 1;		//!< the use of Rcv channel 1 RxGainMax is selectable
    uint32 DisableXmtSymbFreqChange   : 1;            //!< the use of a custom XmtSymbFreq is NOT allowed [deprecated]
    uint32 DisableRcvSymbFreqChange   : 1;            //!< the use of a custom RcvSymbFreq is NOT allowed [deprecated]
    uint32 DisableXmtUpSampling       : 1;            //!< Xmt UpSampling is NOT possible (don't use MODE_SW_UPSAMPLING)
    uint32 Reserve_1		        :23;		//!< Reserve Bits uint32[1]

    /* uint32 WordBoundary [2] */
    uint32	XmtSymbFreq		:16;		//!< Transmit Symbol Frequency in kHz (1...56.000)
    uint32 RcvSymbFreq		:16;		//!< Receive  Symbol Frequency in kHz (1...56.000)

    /* uint32 WordBoundary [3] */
    uint32 Reserve_3		        :32;		//!< Reserve Bits uint32[3]
}FEATURE_SELECT_STRUCT;			        	//!< 16Byte (128Bit) structure for Feature Selection

typedef struct
{
    uint32	RfeRx0On		: 1;		//!< RfeRx0On	==> RX-Mixer and ZF for X-Band RX
    uint32	RfeTx0On		: 1;		//!< RfeTx0On	==> TX-Mixer, Preamplifier S- and X-Band Tx0-Path
    uint32	RfePa0On		: 1;		//!< RfePa0On	==> Power Amplifier Tx0-Path
    uint32	RfeRxTx0		: 1;		//!< RfeRxTx0	==> used for PLL and VCO power on/off
    uint32	RfeRx1On		: 1;		//!< RfeRx1On	==> X-Band-LNA RX, 2x+J26S-BAND-LNA. (all)
    uint32	RfeTx1On		: 1;		//!< RfeTx1On	==> TX-Mixer, Preamplifier S- and X-Band Tx1-Path
    uint32	RfePa1On		: 1;		//!< RfePa1On	==> Power Amplifier Tx1-Path
    uint32	RfeRxTx1		: 1;		//!< RfeRxTx1	==> set to '1'
    uint32	RfeOutEn		: 1;		//!< RfeGPio2	==> Output RF_Out_EN Pin LO
    uint32	RfeGpio0		: 1;		//!< RfeGPio0	==> note used
    uint32	RfeLoopDet		: 1;		//!< RfeGPio1	==> Input Loop Detect Pin
    uint32	RfeLoMux		: 1;		//!< RfeGPio3	==> Input LO MUX_Pin
    uint32	RfePowOn		: 1;		//!< RfePowOn	==> not used
    uint32	RfeDA			: 1;		//!< RfeDA	==> Data (3-wire-Bus)
    uint32	RfeCL			: 1;		//!< RfeCL	==> Clock (3-wire-Bus)
    uint32	RfeEnAD5304		: 1;		//!< RfeEn1	==> EN DAC (AD5304) A:XO_VC; B:Bias1; C:Bias2; D:not used
    uint32	RfeEnSynth		: 1;		//!< RfeEn2	==> Syntheser Max2870
    uint32	RfeEn3			: 1;		//!< RfeEn3	==> free for further use
    uint32	RfeEn4			: 1;		//!< RfeEn4	==> free for further use
    uint32	RfeEn5			: 1;		//!< RfeEn5	==> free for further use
    uint32	Rfe7V0En		: 1;		//!< Rfe7V0En	==> 7V0 PowerOn enable
    uint32	RfeRsvuint32		:11;		//!< Rfe reserve to uint32
} RFE_HW_PIN_STRUCT; /* "SAVED_PARAM" but not load */		//!< ==> 1xuint32 Structure for RFE HW-Pins

typedef struct
{
    int32 RxMix[2];				//!< RFE receive DownConversionFrequency (RxMix) Channel 0/1	--> saved / default 0 / 5900000
    int32 TxMix[2];				//!< RFE transmit UpConversionFrequency (TxMix) Channel 0/1	--> saved / default 5900000
    int32 RxFreq[2];				//!< RFE receive Frequency Channel 0/1				--> saved / default 2020000
    int32 TxFreq[2];				//!< RFE transmit Frequency Channel 0/1				--> saved / default 8300000
}RFE_FREQ_STRUCT; /* "SAVED_PARAM" */		//!< ==> 8xuint32 Structure for RFE Frequencies

typedef struct
{
    int32 RxLow[2];				//!< RFE HW-Rcv lowest  possible frequency Channel 0/1		--> saved / default 0
    int32 RxHigh[2];				//!< RFE HW-Rcv highest possible frequency Channel 0/1		--> saved / default 12000000
    int32 TxLow[2];				//!< RFE HW-Xmt lowest  possible frequency Channel 0/1		--> saved / default 0
    int32 TxHigh[2];				//!< RFE HW-Xmt highest possible frequency Channel 0/1		--> saved / default 12000000
}LIM_FREQ_STRUCT;/* "SAVED_PARAM" */		//!< ==> 8xuint32 Structure for RFE HW-Frequencies Limits

typedef struct
{
    uint32 _2Rx2Tx		: 1;		//!< flag for use 2Rx2Tx mode (two channels parallel)
    uint32 TxLevel_0		:11;		//!< Tx Level for XmtChannel 0 (0...2047)
    uint32 TxLevel_1		:11;		//!< Tx Level for XmtChannel 1 (0...2047)
    uint32 RefClk		: 8;		//!< AD9361 reference clock in MHz (10...80MHz; XTAL external clock generator)
    uint32 Reserve		: 1;		//!< Reserve
}AD9361_CTR; /* "SAVED_PARAM" */

typedef struct
{
    uint32 XmtSymbFreq		:16;		//!< Transmit Symbol Frequency in kHz (1...56.000)
    uint32 RcvSymbFreq		:16;		//!< Receive  Symbol Frequency in kHz (1...56.000)
} AD9361_SYMB_FREQ; /* "SAVED_PARAM" */

typedef struct
{
    uint32 Modulat_0		: 3;		//!< Xmt Modulation Channel 0;	-> 0-NoMod; 1-BPSK; 2-QPSK; 3-8PSK; 4-16PSK; 5-32PSK; 6-64PSK; 7-
    uint32 Mode_0		: 4;		//!< Xmt Mode Channel 0;	-> 0-idle; 1-single; 2-dual; 3-RndQPSK;...<br>
    uint32 Fec_0		: 3;		//!< Xmt FEC Channel 0;		-> FEC; 0-1/1; 1-1/2; 2-2/3; 3-3/4; 4-5/6; 5-7/8; 6-; 7-
    uint32 ChEn_0		: 1;		//!< Xmt Enable Channel 0;	-> 0-Disable / 1-Enable
    uint32 PRnd_0		: 1;		//!< Xmt PseudoRanomizer 0;	-> 0-Off / 1-On
    uint32 ASMStart_0		: 1;		//!< Xmt ASM at FrmStart 0;	-> 0-Off / 1-On
    uint32 OffsetMod_0	: 1;		//!< Xmt Offset Modulation 0;	-> 0-Off / 1-On
    uint32 Ch1_diff_Ch2	: 1;		//!< if set FPGA output XmtOut_Data <= SigSymb_2 & SigSymb_1; else XmtOut_Data <= SigSymb_1 & SigSymb_1;
    uint32 ChSwitchOn_0	: 1;		//!< Xmt On/Off Channel 0;	-> 0-Off / 1-On
    // --> 16 Bit
    uint32 Modulat_1		: 3;		//!< Xmt Modulation Channel 1;	-> 0-NoMod; 1-BPSK; 2-QPSK; 3-8PSK; 4-16PSK; 5-32PSK; 6-64PSK; 7-
    uint32 Mode_1		: 4;		//!< Xmt Mode Channel 1;	-> 0-idle; 1-single; 2-dual; 3-RndQPSK;...<br>
    uint32 Fec_1		: 3;		//!< Xmt FEC Channel 1;		-> FEC; 0-1/1; 1-1/2; 2-2/3; 3-3/4; 4-5/6; 5-7/8; 6-; 7-
    uint32 ChEn_1		: 1;		//!< Xmt Enable Channel 0;	-> 0-Disable / 1-Enable
    uint32 PRnd_1		: 1;		//!< Xmt PseudoRanomizer 1;	-> 0-Off / 1-On
    uint32 ASMStart_1		: 1;		//!< Xmt ASM at FrmStart 1;	-> 0-Off / 1-On
    uint32 OffsetMod_1	: 1;		//!< Xmt Offset Modulation 1;	-> 0-Off / 1-On
    uint32 ChSwitchOn_1	: 1;		//!< Xmt On/Off Channel 1;	-> 0-Off / 1-On

    uint32 OffsetModNormaly	: 1;		//!< Xmt 1-Offset Modulation normaly;
}XMT_CTR0;/* "SAVED_PARAM" */


typedef struct
{
    uint32 AttTxGain_0	:10;		//!< the Tx Attenuation Channel 0 in 0.1dB (0..89.7)
    uint32 AttTxGain_1	:10;		//!< the Tx Attenuation Channel 1 in 0.1dB (0..89.7)
    uint32 TrFrmSz		:12;		//!< the Transfer Frame Size in Bytes (1..2048; 0-auto) -> without 4 Byte ASM
}XMT_CTR3;/* "SAVED_PARAM" */

typedef struct
{
    int32 PhiOffset16		: 5;		//!< Phase Offset for the outer APSK16 Ring +/-15? in 1? Steps
    uint32 Y16	   	:13;		//!< gamma x 1000 -> relation between r2=1 and r1=r2/y (-> 2,580 = 2580)
    uint32 TxSampFact 	:10;		//!< Factor for the TxSymbol (Sample) Frequency with 256.000Hz Base (3...218 -> 768.000...55.808.000Hz)
    uint32 RsMode	   	: 4;		//!< use CCSDS reed Solomon Encoder 0- Off;
    //!< 1-[255,223]I1; 2-[255,223]I2; 3-[255,223]I3; 4-[255,223]I4; 5-[255,223]I5; 6-[255,223]I8
    //!< 8-[255,239]I1; 9-[255,239]I2; A-[255,239]I3; B-[255,229]I4; C-[255,239]I5; D-[255,239]I8
}XMT_CTR4;/* "SAVED_PARAM" */

typedef struct
{
    uint32 RcvMode		: 4;		//!< 0x0-Transparent; 0x1-CalcPowPhi; 0x2-...
    uint32 RcvChannel		: 2;		//!< 00-> RCV_OFF; 01-> RCV_CH0; 10-> RCV_CH1; 11-> RCV_BOTH
    uint32 ChSwitchOn_0	: 1;		//!< Rcv On/Off Channel 0;		-> 0-Off / 1-On
    uint32 ChSwitchOn_1	: 1;		//!< Rcv On/Off Channel 1;		-> 0-Off / 1-On
    uint32 DropSample		:12;		//!< Drop Samples (0...3499)
    uint32 dT_minus           : 1;            //!< correct dt with 1/32 Symbole during decimation
    uint32 dT_plus            : 1;            //!< correct dt with 1/32 Symbole during decimation
    uint32 Reserve            :10;
    //uint32 DropSample	:10;		//!< Drop Samples (0...875)
    //uint32 ExtraDropSample	: 2;		//!< extra Drop Samples (0/1/2/3)x4
    //uint32 SampPerSymb	: 2;		//!< Samples per Symbol 1->4; 2->8; 0/3->16;
    //uint32 CheckSymb	: 2;		//!< Number of Symbols for calc dPhi 0->32; 1->64; 2->128; 3->256
    //uint32 Reserve		: 8;
}RCV_CTR0;/* "SAVED_PARAM" */

typedef struct
{
    uint32 RxGainMax		: 8;		//!< Rcv max RxGain Value		-> 0..76 (offset in RxGainCtr Table)
    uint32 ChEn		: 1;		//!< Rcv Enable Channel 0;		-> 0-Disable / 1-Enable
    uint32 Modulat		: 3;		//!< Rcv Modulation			-> 0-NoMod; 1-BPSK; 2-QPSK; 3-8PSK; 4-16PSK; 5-32PSK; 6-64PSK; 7-
    uint32 MsbFirst		: 1;		//!< Rcv Bit Direction			-> 0-LsbFirst; 1-MsbFirst
    uint32 Fec		: 3;		//!< Rcv FEC				-> FEC; 0-1/1; 1-1/2; 2-2/3; 3-3/4; 4-5/6; 5-7/8; 6-; 7-
    uint32 PRnd		: 1;		//!< Rcv PseudoRanomizer		-> 0-Off / 1-On
    uint32 BchDec		: 1;		//!< Rcv BCH Decoder			-> 0-Off / 1-On
    uint32 AccBchErr		: 1;		//!< Rcv accept BCH Error		-> 0-Off / 1-On
    uint32 BchCountMode	: 1;		//!< Rcv bch count mode			-> 0-for ever / 1-rx sync phase only
    uint32 PwrOff		: 6;		//!< PowerOff				-> 0..63 dB (power threshold for detect RF-Signal-Power below the calibrated limitation)
    int32 RcvCalib		: 6;		//!< Rcv Calibration Offset		-> -31..+31 dB; for 12 different FrequencyBands a 500MHz
}RCV_CTR;/* "SAVED_PARAM" */

typedef struct
{
    int32 AD9361		: 8;		//!< Temperature in ?C of the AD9361 Chip
    int32 EthPhy		: 8;		//!< Temperature in ?C of the Ethernet PHY Chip
    int32 Zynq		: 8;		//!< Temperature in ?C of the ZYNQ Chip
    int32 Rest		: 8;		//!< Rest
} TEMPERATURE_STRUCT;				//!< Temperature of three different HW chips

typedef struct
{
    uint32 On			: 1;		//!< Flag if Rcv Channel x HW is active (ON)
    uint32 Sync		: 1;		//!< Flag if Rcv Channel x is in SYNC state, if channel active
    uint32 idxGain		: 7;		//!< Rcv Channel x Gain (0..76dB), if channel active
    uint32 SirMin		: 6;		//!< Rcv Channel x Min. SIR (0..63dB), if channel active
    uint32 SirMax		: 6;		//!< Rcv Channel x Max. SIR (0..63dB), if channel active
    int32 DopplerFreq		: 9;		//!< Doppler frequency (+/-200kHz) if Rcv Channel x is in SYNC state
    uint32 Rest0		: 2;		//!< Rest

    uint32 PwrMin		: 6;		//!< Rcv Channel x Min. PWR (0..63dB), if channel active
    uint32 PwrMax		: 6;		//!< Rcv Channel x Max. PWR (0..63dB), if channel active
    uint32 RxState		: 8;		//!< Information about the Status of the RX state machine
    uint32 Rest1		:12;		//!< Rest

    uint32 BchBlockCount;			//!< counts all bch blocks during the SYNC state

    uint32 BchErrCount;			//!< counts the bch blocks with errors during the SYNC state
} RCV_INF_STRUCT;				//!< Informations about the current state of the Rcv Channel

typedef struct
{
    uint32 On			: 1;		//!< Flag if Xmt Channel x HW is active (ON)
    uint32 Modulation		: 4;		//!< Xmt Modulation, 0-NoMod; 1-BPSK; 2-QPSK; 3-8PSK; 4-16PSK; 5-32PSK; 6-64PSK;
    uint32 Fec		: 4;		//!< Xmt FEC, 0-1/1; 1-1/2; 2-2/3; 3-3/4; 4-5/6; 5-7/8;
    uint32 Att		:10;		//!< Xmt attenuation (0.0 - 89.7dB) in steps of 1/10dB
    //uint32 FpgaMode		: 4;		//!< FpgaMode  0-idle; 1-single; 2-dual; 3-RndQPSK;...
    uint32 Rest		: 13;		//!< Rest
} XMT_INF_STRUCT;				//!< Informations about the current state of the Xmt Channel

/* !!! NOTE !!!
 * HOUSE_KEEP_STRUCT have to be U64 aligned! (because of double datatypes)
 */
typedef struct
{
    /*----------------------- U64 boundary [0] -------------------------*/
    double Volt[6];								//!< 6 different CPU Voltages: VCCINT, VCCAUX, VCCBRAM, VCCPINT, VCCPAUX, VCCPDRO
    /*----------------------- U64 boundary [6] -------------------------*/
    TEMPERATURE_STRUCT Temp;							//!< Temperature of three different HW chips
    RCV_INF_STRUCT RcvInfCh[2];							//!< Informations about the current state of the Rcv Channel
    XMT_INF_STRUCT XmtInfCh[2];							//!< Informations about the current state of the Xmt Channel
    uint32 card_run_counter;							//!< OS counter/timer for system ticks
    /*----------------------- U64 boundary [12] -------------------------*/
} HOUSE_KEEP_STRUCT;		//!< XLINK House Keeping Data

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4];						//!< XLINK device specific key
    uint32 service_event;						//!< type of the service request
    /*----------------------- uint32 boundary [5] -------------------------*/
    uint32 data;								//!< max. 1428 byte (357xuint32)
} SERVICE_COMMON_STRUCT;

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4];						//!< XLINK device specific key
    uint32 service_event;						//!< type of the service request
    /*----------------------- uint32 boundary [5] -------------------------*/
} SERVICE_IDLE_STRUCT;

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4];						//!< XLINK device specific key
    uint32 service_event;						//!< type of the service request
    /*----------------------- uint32 boundary [5] -------------------------*/
} SERVICE_RESET_STRUCT;

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4];						//!< XLINK device specific key
    uint32 service_event;						//!< type of the service request
    /*----------------------- uint32 boundary [5] -------------------------*/
    uint32 ip_address;							//!< IP-Address

} SERVICE_IP_ADR_STRUCT;

typedef struct
{
    uint32 Seconds			: 6;				//!< 6 bits to represent 60 seconds in a minute
    uint32 Minutes			: 6;				//!< 6 bits to represent 60 minutes in an hour
    uint32 Hours			: 5;				//!< 5 bits to represent 24 hours in a day
    uint32 Year			: 6;				//!< 6 bits to represent 0 to 63 (to note year 2000 to 2063)
    uint32 Months			: 4;				//!< 4 bits to represent 12 months in a year
    uint32 Day			: 5;				//!< 5 bits to represent 31 days in a month
    uint8 FileName[4];						//!< 4 byte for File Name; FPGA / SWAP(CPU0) / CPU1(optional)
    uint32 start_adr;						//!< first address in QSPI (only for information)
    uint32 len			:28;				//!< len in byte (only for information)
    uint32 Flags			: 4;				//!< Flags for SOLL-1; RUN- 0x2;...
} VERSION_DATE_STRUCT;					//!< Structure for Version Info

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4];						//!< XLINK device specific key
    uint32 service_event;						//!< type of the service request
    /*----------------------- uint32 boundary [5] -------------------------*/
    VERSION_DATE_STRUCT	prog_version;
} SERVICE_VERSION_STRUCT;

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4];						//!< XLINK device specific key
    uint32 service_event;						//!< type of the service request
    /*----------------------- uint32 boundary [5] -------------------------*/
    VERSION_DATE_STRUCT	prog_version[15];
} SERVICE_VERSION_STRUCT_SET;

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4];						//!< XLINK device specific key
    uint32 service_event;						//!< type of the service request
    /*----------------------- uint32 boundary [5] -------------------------*/
    uint32 PktType			: 2;				//!< type of Packet
    uint32 ErrInf			: 5;				//!< error information
    uint32 PktLen			:12;				//!< number of bytes per message(payload packet)
    uint32 EthFirst		: 1;				//!< 1- first Ethernet packet of fragmented message(payload packet)
    uint32 EthLast			: 1;				//!< 1- last Ethernet packet of fragmented message(payload packet)
    uint32 EthNumByte		:11;				//!< number of payload bytes in this Ethernet packet
    /*------------------  uint32 word boundary  -------------------*/
    uint32 MoreInfo;							//!< Magic Number, Free Bytes, ....
    uint8 Payload[10];						//!< Payload Data (1...2048 depending on PktLen)
} SERVICE_RF_XMT_DATA_STRUCT;

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4];						//!< XLINK device specific key
    uint32 service_event;						//!< type of the service request
    /*----------------------- uint32 boundary [5] -------------------------*/
    uint32 ip_address;							//!< Destination IP-Address for the RcvData
    uint32 port				:16;				//!< Destination UDP Port
    uint32 send_format		: 4;				//!< the SERVICE_RF_XMT_DATA_STRUCT can be reduced
#define RF_RCV_SEND_NORMAL 0x0 //!< sends the complete SERVICE_RF_XMT_DATA_STRUCT
#define RF_RCV_SEND_ERR_INF 0x1 //!< sends only parts of the STRUCT -> starts with PktType
#define RF_RCV_SEND_RAW 0x2 //!< if the BchBlk is correct decoded, sends only the data
#define RF_RCV_SEND_CLTU 0x3 //!< sends complete CLTUs
    /* NOTE: more then one EthPacket could be necessary */
	uint32 output_interface	: 3; //!< the data output interface
	#define RF_RCV_OUTPUT_UDP 0x0 //!< send uplink data over UDP/ETH
	#define RF_RCV_OUTPUT_CSP 0x1 //!< send uplink data over CSP/UART
	#define RF_RCV_OUTPUT_SPI 0x2 //!< send uplink data over SPI
    uint32 Reserve			: 9;				//!< reserve
} SERVICE_START_RF_RCV_STRUCT;

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4];						//!< XLINK device specific key
    uint32 service_event;						//!< type of the service request
    /*----------------------- uint32 boundary [5] -------------------------*/
    FEATURE_SELECT_STRUCT feature_select;	//!< 16Byte (128Bit) structure for Feature Selection
}SERVICE_FEATURE_SELECT_STRUCT;

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4];						//!< XLINK device specific key
    uint32 service_event;						//!< type of the service request
    /*----------------------- uint32 boundary [5] -------------------------*/
    RFE_HW_PIN_STRUCT   	HwPins;				//!< 1xuint32 Structure for RFE HW-Pins
    RFE_FREQ_STRUCT		RfeFreq;			//!< 8xuint32 Structure for RFE Frequencies
    LIM_FREQ_STRUCT		LimFreq;			//!< 8xuint32 Structure for RFE HW-Frequencies Limits
    AD9361_CTR			AdCtr;				//!< 1xuint32 Structure for AD9361 Parameters
    XMT_CTR0			XmtCtr0;			//!< 1xuint32 Structure for FPGA control (Xmt signal generation)
    XMT_CTR3			XmtCtr3;			//!< 1xuint32 Structure for Xmt Power and Transfer Frame Size control
    XMT_CTR4			XmtCtr4;			//!< 1xuint32 Structure for more Xmt Parameters
    RCV_CTR			RcvCtrCh[2];    		//!< 2xuint32 Structure for different Rcv Parameters
    AD9361_SYMB_FREQ    	SymbFreq;			//!< 2xU16 Xmt/Rcv Symbol Frequency
    RCV_CTR0			RcvCtr_0;			//!< 1xuint32 Structure for Rcv ChSwitchOn_0/1
} SERVICE_DEVICE_CONF_STRUCT;

typedef struct
{
    /*----------------------- U64 boundary [0] -------------------------*/
    uint32 product_key[4];						//!< XLINK device specific key
    /*----------------------- U64 boundary [2] -------------------------*/
    uint32 service_event;						//!< type of the service request
    uint32 Rest;								//!< data structure alignment (8 byte)
    /*----------------------- U64 boundary [3] -------------------------*/
    HOUSE_KEEP_STRUCT HouseKeep;			//!< XLINK House Keeping Data
}SERVICE_HOUSE_KEEP_STRUCT;

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4]; //!< XLINK device specific key
    uint32 service_event; //!< type of the service request
    /*----------------------- uint32 boundary [5] -------------------------*/
    uint32 ModCod_0 : 5; //!< Configuration: MODCOD see table below
    uint32 FrmType_0 : 2; //!< Frame type 0-NORMAL; 1-SHORT; 2-ALTERNATIV;
    uint32 InsertPilots_0 : 1; //!< Pilots insertion 0-Off, 1-On
    uint32 Acm_Ccm_0 : 1; //!< 0-ACM(Adaptive-CM), 1-CCM(Constant-CM)
    uint32 RollOffVal_0 : 3; //!< RollOff Factor 2-0.20
    uint32 PlSpreadNumber_0 :18; //!< PL spreading sequence number, 0...262141, mission constant
    uint32 Reserve_0 : 2; //!< reserve bits
    /*----------------------- uint32 boundary [6] -------------------------*/
    uint32 Reserve_1; //!< dummy for future channel specific configs or other
} SERVICE_DVBS2_CONF_STRUCT; /* size: 28 bytes (7 WORDs) */


/***
 * @brief This is newly added structure as per vendors latest service manual v1.7.1
 *
 */

typedef struct
{
/*----------------------- U32 boundary [0] -------------------------*/
uint32_t product_key[4]; //!< XLINK device specific key
uint32_t service_event; //!< type of the service request
/*----------------------- U32 boundary [5] -------------------------*/
uint32_t PGOOD_0 :1; //!< XPA 0 flag if internal power supply is good
uint32_t Rest_0 :31; //!< reserve
/*----------------------- U32 boundary [6] -------------------------*/
int32_t Current_0 :16; //!< XPA 0 internal amplifier current
int32_t Temp_int_0 :16; //!< XPA 0 internal Temperature
/*----------------------- U32 boundary [7] -------------------------*/
uint32_t PGOOD_1 :1; //!< XPA 0 flag if internal power supply is good
uint32_t Rest_1 :31; //!< reserve
/*----------------------- U32 boundary [8] -------------------------*/
int32_t Current_1 :16; //!< XPA 0 internal amplifier current
int32_t Temp_int_1 :16; //!< XPA 1 internal Temperature
} SERVICE_XPA_INF_STRUCT; /* size: 36 bytes (9 WORDs) */




#if 0
typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4]; //!< XLINK device specific key
    uint32 service_event; //!< type of the service request Here: 0x2000000F
    /*----------------------- uint32 boundary [5] -------------------------*/
    uint32 ControlBits; //!< TxFiFo init/flush:
    /*----------------------- uint32 boundary [6] -------------------------*/
    uint32 MoreInfo; //!< Magic Number:
    /*----------------------- uint32 boundary [7] -------------------------*/
} SERVICE_RF_XMT_DATA_STRUCT; /* Service Server Request FIFO init */

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4]; //!< XLINK device specific key
    uint32 service_event; //!< type of the service response
    /*----------------------- uint32 boundary [5] -------------------------*/
    uint32 PktType : 2; //!< type of Packet:
    uint32 ErrInf : 5; //!< error information:
    uint32 PktLen :12; //!< number of processed input data bytes (incl. Service Server structures)
    uint32 EthFirst : 1; //!< not used
    uint32 EthLast : 1; //!< not used
    uint32 EthNumByte:11; //!< not used
    /*----------------------- uint32 boundary [6] -------------------------*/
    uint32 MoreInfo; //!< If RF_XMT_PKT_DROP, the missing UDP packet counter, else the currently occupied internal TransferFrame (FIFO-)memory
    /*----------------------- uint32 boundary [7] -------------------------*/
} SERVICE_RF_XMT_DATA_STRUCT; /* Service Server Response */

typedef struct
{
    /*----------------------- uint32 boundary [0] -------------------------*/
    uint32 product_key[4]; //!< Character string: ""\r\nRF-RCVData----""
    uint32 service_event; //!< Here: 0x0000000F
    /*----------------------- uint32 boundary -------------------------*/
    uint32 PktType : 2; //!< type of Packet
    uint32 ErrInf : 5; //!< error information
    uint32 PktLen :12; //!< not used
    uint32 EthFirst : 1; //!< 1- first Ethernet packet of fragmented message(payload packet)
    uint32 EthLast : 1; //!< 1- last Ethernet packet of fragmented message(payload packet)
    uint32 EthNumByte:11; //!< number of payload bytes in this Ethernet packet (always 7)
    /*----------------------- uint32 boundary -------------------------*/
    uint32 MoreInfo; //!< Index of BCH block data within received CLTU or 0x0001FFFF for CLTU tail sequence
    /*----------------------- uint32 boundary -------------------------*/
    uint8 Payload[7]; //!< 7-Byte BCH decoded data or CLTU tail sequence
} SERVICE_RF_XMT_DATA_STRUCT; /* RF_RCV_Data */
/* 35 bytes, if send_format = RF_RCV_SEND_NORMAL */
/* 15 bytes, if send_format = RF_RCV_SEND_ERR_INF */
#endif

/* !!! NOTE !!!
 * All members of the SERVICE_UNION have to be uint32 alignment a size! (with the exception of SERVICE_HOUSE_KEEP_STRUCT -> U64)
 * Also all transferred Packets have to be modulo 4(n x uint32) size!
 */
typedef union COMMAND_STRUCT
{
    SERVICE_COMMON_STRUCT		service_common;
    SERVICE_IDLE_STRUCT			service_idle;
    SERVICE_RESET_STRUCT		service_reset;
    SERVICE_IP_ADR_STRUCT               service_ip_adr;
    //SERVICE_VERSION_STRUCT	        service_version;
    //SERVICE_START_RF_RCV_STRUCT       service_start_rf_rcv;
    SERVICE_RF_XMT_DATA_STRUCT	        service_rf_xmt_data;
    SERVICE_DEVICE_CONF_STRUCT		service_device_conf;
    SERVICE_HOUSE_KEEP_STRUCT		service_house_keep;
    //SERVICE_FEATURE_SELECT_STRUCT	service_feature_select;
}COMMAND_STRUCT;


typedef struct {
    uint8_t radio_id;
    uint8_t gpass_beacon_tx_enb;
    uint8_t beacon_tx_count;
    uint32_t beacon_tx_interval;
}__attribute__((__packed__))s_gpass_beacon_cfg;


typedef struct  __attribute__((packed))
{
    uint8_t Channel_Number ;
    uint8_t Modulation_Type ;
    uint8_t Sync_Mode ;
    uint8_t Enable_DC_filter ;
    uint8_t FEC_enable ;
    uint8_t Preamble_Num ;
    uint8_t Manchester_Enable;
    uint8_t rcvd;
    float Base_Frequency     ;
    float IF_Frequnecy;
    float Channel_Spacing ;
    float Frequency_Offset ;
    float Data_Rate ;
    float Channel_BW ;
    float Frequency_deviation;
}s_uhf_rf_cfg;

typedef struct  __attribute__((packed))
{
    uint8_t Channel_Number ;
    uint8_t Modulation_Type ;
    uint8_t Sync_Mode; 
    uint8_t Enable_DC_filter ;
    uint8_t FEC_enable ;
    uint8_t Preamble_Num ;
    uint8_t Manchester_Enable;
    uint8_t RX_Attenuation;
    float Base_Frequency; 
    float IF_Frequnecy ;
    float Channel_Spacing ;
    float Frequency_Offset ;
    float Data_Rate ;
    float Channel_BW;
    float Frequency_deviation ;
    float RX_Sync_Time_Out ;
}s_uhf_rf_rx_cfg;

typedef struct  __attribute__((packed))
{
    uint16_t Demod_Sync_Word ;
    uint8_t Max_Packet_Length ;
    uint8_t Whitening_Enable ;
    uint8_t Packet_Format ;
    uint8_t CRC_Enable ;
    uint8_t Pkt_Len_Config ;
    uint8_t Device_Addr;
}s_uhf_rf_tx_pkt_cfg;


typedef struct  __attribute__((packed))
{
    uint16_t Demod_Sync_Word ;
    uint8_t Max_Packet_Length ;
    uint8_t Whitening_Enable ;
    uint8_t Packet_Format ;
    uint8_t CRC_Enable ;
    uint8_t Pkt_Len_Config ;
    uint8_t Device_Addr;
}s_uhf_rf_rx_pkt_cfg;

typedef struct  __attribute__((packed))
{
    uint8_t Max_DVGA_Gain ;
    uint8_t Max_LNA_Gain ;
    uint8_t LNA_Sel ;
    uint8_t Filter_Len ;
    uint8_t Power_Table_sel ;
    uint8_t RF_Output_Power;
}s_uhf_set_pwr_stng;

typedef struct __attribute__((packed))
{
    uint8_t radio_id ;
    uint8_t sdr_sts ;
    uint8_t sdr_dplx_typ ;
    uint8_t sdr_num_rx ;
    uint8_t sdr_num_tx ;
    uint8_t combined_rx_support ;
    uint8_t combined_tx_support ;
    uint32_t min_frequency ;
    uint32_t max_frequency ;
    uint32_t min_frequency_rx ;
    uint32_t max_frequency_rx ;
    uint32_t rsvd[10] ;
}s_sdr_cfg;

typedef struct __attribute__((packed))
{
   uint8_t radio_id;
   uint8_t sdr_sts;  
}s_sdr_set_sts;

typedef struct __attribute__((packed))
{
   uint8_t ps_id;
   uint8_t ps_ssd_id;  
}s_ps_brd_ssd_id;

typedef struct __attribute__((packed))
{
  //  uint8_t radio_id;
    uint32_t beacon_enb_tmr ;
    uint32_t beacon_prd_tmr ;
    uint32_t beaocn_rep_tmr ;
    uint32_t tx_data_rep_cnt;
    uint32_t sdr_tm_tmr ;
    uint32_t sdr_tx_on_tmr ;
    uint32_t sdr_rx_on_tmr ;
    uint32_t sdr_tm_read_tmr ;
}s_sdr_tmr_cfg;

typedef struct __attribute__((packed))
{
    //uint8_t radio_id;
    uint8_t valid_rssi_cnt ;
    uint8_t inv_rssi_cnt ;
    float rssi_min ;
    float rssi_typ ;
    uint32_t rssi_prd_tmr ;
    uint32_t short_rx_on_timer ;
    uint32_t long_rx_on_timer ;    
}s_sdr_rx_rssi_cfg;

typedef struct __attribute__((packed))
{
    //uint8_t radio_id;
    uint8_t tm_auto_read_sts ;
    uint32_t tm_read_periodicity ;
    uint32_t tm_short_storage_duration ;
    uint32_t tm_long_storage_duration ;
}s_sdr_tm_cfg;

typedef struct __attribute__((packed))
{

	uint16_t temp_sens_typ_thrs;
	uint16_t temp_sens_min_thrs;
	uint16_t temp_sens_max_thrs;

}s_comms_temp_sns;

typedef struct __attribute__((packed))
{

	uint16_t volt_sens_typ_thrs;
	uint16_t volt_sens_min_thrs;
	uint16_t volt_sens_max_thrs;

}s_comms_volt_sns;

typedef struct __attribute__((packed))
{

	uint16_t cur_sens_typ_thrs;
	uint16_t cur_sens_min_thrs;
	uint16_t cur_sens_max_thrs;

}s_comms_cur_sens;

typedef struct __attribute__((packed))
{
	s_comms_temp_sns  temp_sensor[TEMP_SNS_CNT];
	s_comms_volt_sns  volt_sensor[VOLT_SNS_CNT];
	s_comms_cur_sens   current_sensor[CUR_SNS_CNT];

}s_sdr_sens_cfg;

typedef struct __attribute__((packed))
{
    uint32_t uptime; 
    uint32_t uart0_rx_count; 
    uint32_t uart1_rx_count; 
    uint8_t rx_mode; 
    uint8_t tx_mode; 
}s_uhf_get_basic_tm;


typedef struct __attribute__((packed))
{
    uint32_t uptime; 
    uint32_t uart0_rx_count; 
    uint32_t uart1_rx_count; 
    uint8_t rx_mode; 
    uint8_t tx_mode; 
    int16_t adc[10]; 
    int8_t last_rssi; 
    uint8_t last_lqi; 
    int8_t last_freqest; 
    uint32_t Pkt_sent; 
    uint32_t cs_count; 
    uint32_t Pkt_good; 
    uint32_t Pkt_rejected_checksum; 
    uint32_t Pkt_rejected_reserved; 
    uint32_t Pkt_rejected_other; 
    uint32_t reserved0;
    //uint32_t reserved1;
    uint32_t custom0;
    uint32_t custom1;
}s_uhf_get_full_tm;

#define PERI_UHF_HK_SYNC_ID 32

typedef struct __attribute__((packed))
{
        uint64_t  time_stamp;
        s_uhf_get_full_tm comms_uhf_tm_stor;
}s_comms_uhf_get_tm_prop_time;

typedef struct __attribute__((packed))
{       
	uint8_t cnt_hk_str;
	s_comms_uhf_get_tm_prop_time uhf_tm_store[PERI_UHF_HK_SYNC_ID];
}s_comms_uhf_get_tm_prop;

typedef struct {
    uint8_t sync1;
    uint8_t sync0;
    uint8_t pktlen;
    uint8_t pktctrl1;    // Packet Automation Control
    uint8_t pktctrl0;    // Packet Automation Control
    uint8_t addr;
    uint8_t channr;      // Channel Number
    uint8_t fsctrl1;     // Frequency Synthesizer Control
    uint8_t fsctrl0;     // Frequency Synthesizer Control
    uint8_t freq2;       // Frequency Control Word, High Byte
    uint8_t freq1;       // Frequency Control Word, Middle Byte
    uint8_t freq0;       // Frequency Control Word, Low Byte
    uint8_t mdmcfg4;     // Modem configuration
    uint8_t mdmcfg3;     // Modem Configuration
    uint8_t mdmcfg2;     // Modem Configuration
    uint8_t mdmcfg1;     // Modem Configuration
    uint8_t mdmcfg0;     // Modem Configuration
    uint8_t deviatn;     // Modem Deviation Setting
    uint8_t mcsm2;       // Main Radio Control State Machine Configuration
    uint8_t mcsm1;       // Main Radio Control State Machine Configuration
    uint8_t mcsm0;       // Main Radio Control State Machine Configuration
    uint8_t foccfg;      // Frequency Offset Compensation Configuration
    uint8_t bscfg;       // Bit Synchronization Configuration
    uint8_t agcctrl2;    // AGC Control
    uint8_t agcctrl1;    // AGC Control
    uint8_t agcctrl0;    // AGC Control
    uint8_t frend1;      // Front End RX Configuration
    uint8_t frend0;      // Front End TX Configuration
    uint8_t fscal3;      // Frequency Synthesizer Calibration
    uint8_t fscal2;      // Frequency Synthesizer Calibration
    uint8_t fscal1;      // Frequency Synthesizer Calibration
    uint8_t fscal0;      // Frequency Synthesizer Calibration
    uint8_t test2;       // Various Test Settings
    uint8_t test1;       // Various Test Settings
    uint8_t test0;       // Various Test Settings
    uint8_t pa_table7;   // PA Power Setting 0
    uint8_t pa_table6;
    uint8_t pa_table5;
    uint8_t pa_table4;
    uint8_t pa_table3;
    uint8_t pa_table2;
    uint8_t pa_table1;
    uint8_t pa_table0;
    uint8_t iocfg2;
    uint8_t iocfg1;
    uint8_t iocfg0;
}s_uhf_cc1110_reg_map;

typedef struct
{
    uint32_t instance_id;
    uint32_t polling_tmr_prdcty;
    float high_temp_thrsld;
    float low_temp_thrsld;
    uint8_t adc_resolution;
    uint8_t thrmst_enable;
    uint8_t thrmst_pin_polarity;
    uint8_t conversion_type;

}__attribute__ ((__packed__))digital_thermostat_cfg;

typedef struct
{
    uint32_t instance_id;
    uint32_t polling_tmr_prdcty;
    float high_temp_thrsld;
    float low_temp_thrsld;
    uint8_t adc_resolution;
    uint8_t intr_mask;
    uint8_t intr_pin_polarity;
    uint8_t conversion_type;

}__attribute__((packed, aligned(4)))temp_sens_cfg;

typedef struct
{
    uint32_t instance_id;
    uint8_t intr_mask;
    uint8_t intr_pin_polarity;

}__attribute__((packed, aligned(4)))gpio_exp_cfg;

typedef struct
{
    uint32_t instance_id;
    uint32_t polling_tmr_prdcty;
    float voltage_thrsld;
    float current_thrsld;
    uint8_t intr_msk;
    uint8_t intr_pin_polarity;
    uint8_t hotswap_sts;
    uint8_t conversion_type;

}__attribute__((packed, aligned(4)))hotswap_cntlr_cfg;

typedef struct
{
    uint32_t instance_id;
    uint32_t polling_tmr_prdcty;
    float vbus_thrsld;
    uint32_t power_thrsld;
    float current_thrsld;
    uint8_t intr_type;
    uint8_t intr_pin_polarity;
    uint8_t conversion_type;

}__attribute__((packed, aligned(4)))power_mntr_sns_cfg;

typedef struct
{
    uint32_t instance_id;
    uint32_t polling_tmr_prdcty;
    uint8_t  intr_mask;

}__attribute__((packed, aligned(4)))voltage_seq_mntr_cfg;

typedef struct
{
    uint8_t calib_data_cnt;
    uint32_t instance_id;
    uint8_t mjr_vrsn;
    uint8_t mnr_vrsn;
    uint16_t ptch_vrsn;
    uint8_t brd_err_cde;
    uint8_t brd_err_count;
    uint8_t rst_sts;
    uint32_t strt_tm;
    uint32_t master_tm;
    uint32_t bkpln_master_tm;			/*!< master time of backplane			*/
    uint8_t rst_backplane;		    	/*!< backplane reset			    	*/
    uint16_t pwr;		    		/*!< power		    			*/
    uint16_t unreg_vol;			    	/*!< unregulated voltage			*/
    uint32_t unit_master_tm;			/*!< master time of unit			*/
    uint8_t mode;		    		/*!< mode		    			*/
    uint16_t dev_on_sts;		    	/*!< device on status				*/
    uint8_t rst_sts_unit;		    	/*!< reset status of unit		    	*/
    int8_t temp;		    		/*!< temperature	    			*/
    uint16_t prplt;		    		/*!< propellant		    			*/
    uint16_t force;		    		/*!< force		    			*/
    uint16_t azmth; 				/*!< azimuthal angle		    		*/
    uint8_t polar;		    		/*!< polar angle		    		*/
    uint16_t unregu_vol;		    	/*!< unregulated voltage		    	*/
    uint32_t calib_data[SNS_CALIB_DATA_CNT]; 			/*!< calibration value		    		*/
    uint8_t heat_err;		    		/*!< heater error		    		*/
    uint8_t heat_duty;		    		/*!< heater duty cycle			    	*/
    int8_t heat_temp;		    		/*!< heater temperature			    	*/
    int8_t heat_targ_temp;		    	/*!< heater target temperature			*/
    uint16_t emit_vol;			    	/*!< emitter voltage			    	*/
    uint16_t emit_cur;			    	/*!< emitter current			    	*/
    uint16_t emit_ip_cur;	    		/*!< emitter current			    	*/
    uint16_t ext1_vol;		    		/*!< extractor1 voltage			    	*/
    uint16_t ext1_cur;		    		/*!< extractor1 current			    	*/
    uint16_t ext1_ip_cur;	    		/*!< extractor1 input current			*/
    uint16_t ext2_vol;		    		/*!< extractor2 voltage			    	*/
    uint16_t ext2_cur;		    		/*!< extractor2 current		    		*/
    uint16_t ext2_ip_cur;	    		/*!< extractor2 input current			*/
    uint16_t ext3_vol;		    		/*!< extractor3 voltage			    	*/
    uint16_t ext3_cur;		    		/*!< extractor3 voltage			    	*/
    uint16_t ext3_ip_cur;	    		/*!< extractor3 voltage			    	*/
    uint16_t ext4_vol;		    		/*!< extractor4 voltage			    	*/
    uint16_t ext4_cur;		    		/*!< extractor4 voltage			    	*/
    uint16_t ext4_ip_cur;	    		/*!< extractor4 voltage			    	*/
    uint16_t ext5_vol;		    		/*!< extractor5 voltage			    	*/
    uint16_t ext5_cur;		    		/*!< extractor5 voltage			    	*/
    uint16_t ext5_ip_cur;	    		/*!< extractor5 voltage				*/
    uint16_t ext6_vol;		    		/*!< extractor6 voltage				*/
    uint16_t ext6_cur;		    		/*!< extractor6 voltage	    			*/
    uint16_t ext6_ip_cur;   			/*!< extractor6 voltage	    			*/
    uint16_t ext7_vol;	    			/*!< extractor7 voltage	    			*/
    uint16_t ext7_cur;	    			/*!< extractor7 voltage	    			*/
    uint16_t ext7_ip_cur;   			/*!< extractor7 voltage				*/
    uint16_t neut1_vol;	    			/*!< neutralizer1 voltage	    		*/
    uint16_t neut1_cur;	    			/*!< neutralizer1 current		    	*/
    uint16_t neut1_ip_cur;  			/*!< neutralizer1 input current			*/
    uint16_t neut1_ret_cur; 			/*!< neutralizer1 return current		*/
    uint16_t neut2_vol;	    			/*!< neutralizer2 voltage	    		*/
    uint16_t neut2_cur;	    			/*!< neutralizer2 current		    	*/
    uint16_t neut2_ip_cur;	    		/*!< neutralizer2 input current			*/
    uint16_t neut2_ret_cur;	    		/*!< neutralizer2 return current		*/
    uint16_t tot_force;				/*!< total force	    		*/
    uint16_t tot_azmth;				/*!< total azimuthal angle		*/
    uint8_t tot_polar;				/*!< total polar angle		    	*/
    uint16_t tot_pwr_cnsp;		/*!< total power consumption		*/
    uint16_t force_unit1;			/*!< force of unit1     	    	*/
    uint8_t azmth_unit1;			/*!< azimuthal angle of unit1	        */
    uint16_t polar_unit1;			/*!< polar angle of unit1	    	*/
    uint16_t pwr_unit1;				/*!< power of unit1	    		*/
    uint8_t mode_unit1;				/*!< mode of unit1	    		*/
    uint16_t force_unit2;			/*!< force of unit2	    		*/
    uint8_t polar_unit2;			/*!< polar angle of unit2   		*/
    uint16_t azmth_unit2;			/*!< azimuthal angle of unit2		*/
    uint16_t pwr_unit2;				/*!< power of unit2		    	*/
    uint8_t mode_unit2;				/*!< mode of unit2  			*/

}__attribute__ ((__packed__))thruster_info;

typedef struct
{
    uint32_t instance_id;
    uint8_t unit_num;
    uint8_t mode;
    float force;

}__attribute__((packed, aligned(4)))thruster_param;

typedef struct
{
    uint32_t instance_id;
    uint8_t chnl_num;
    uint8_t pwr_dwn_optn;
    uint16_t data;

}__attribute__ ((__packed__))data_acq_dvc_info;

typedef struct
{
    uint32_t instance_id;
    uint32_t timer_idx;
    uint8_t event_ctrl;
    uint8_t chnl_num;
    uint8_t pwr_dwn_optn;

}__attribute__((packed, aligned(4)))data_acq_dvc_param;

typedef struct
{
    uint32_t instance_id;
    /*! X-axis sensor data */
    int16_t accel_x;
    /*! Y-axis sensor data */
    int16_t accel_y;
    /*! Z-axis sensor data */
    int16_t accel_z;
    /*! X-axis sensor data */
    int16_t gyro_x;
    /*! Y-axis sensor data */
    int16_t gyro_y;
    /*! Z-axis sensor data */
    int16_t gyro_z;
    /*! X-axis sensor data */
    int16_t mag_x;
    /*! Y-axis sensor data */
    int16_t mag_y;
    /*! Z-axis sensor data */
    int16_t mag_z;
    /*! rhall data */
    int16_t mag_rhall;
    /*! power mode */
    uint8_t power;
    /*! output data rate */
    uint8_t odr;
    /*! range */
    uint8_t range;
    /*! bandwidth */
    uint8_t bw;

}__attribute__ ((__packed__))imu_info;

typedef struct
{
    uint32_t instance_id;
    uint32_t timer_idx;
    /*! power mode */
    uint8_t power;
    /*! output data rate */
    uint8_t odr;
    /*! range */
    uint8_t range;
    /*! bandwidth */
    uint8_t bw;

}__attribute__((packed, aligned(4)))imu_param;

typedef struct
{
    double temperature;
    uint64_t dt_epoch_time;
}__attribute__((packed, aligned(4)))dt_data_s;
typedef struct
{
    float voltage;
    float current;
}__attribute__((packed, aligned(4)))adm_get_info_s;
typedef struct
{
    adm_get_info_s hsc_data;
    uint64_t adm_epoch_time;
}__attribute__((packed, aligned(4)))hsc_data_s;
typedef struct
{
    float vbus_voltage;
    float vshunt_voltage;
    float current;
    uint32_t power;
}__attribute__((packed, aligned(4)))psm_get_info_s;
typedef struct
{
    psm_get_info_s pwr;
    uint64_t psm_epoch_time;
}__attribute__((packed, aligned(4)))psm_data_s;
typedef struct
{
    float temperature;
    uint64_t temp_epoch_time;
}__attribute__((packed, aligned(4)))temp_data_s;
typedef int vltg_seq_rail_num;
typedef struct
{
    float voltage;
    vltg_seq_rail_num rail_no;
}__attribute__((packed, aligned(4)))vsm_get_info_s;
typedef struct
{
    vsm_get_info_s vol;
    uint64_t vsm_epoch_time;
}__attribute__((packed, aligned(4)))vsm_data_s;

/*********************************************************************************/
/***************** TeleCommand Payload Structure Definitions *********************/
/*********************************************************************************/

/*!
 *  @brief This structure holds the Target Pointing request parameter information
 */
typedef struct _tctm_trgt_pt_req
{
    float lat;
    float longit;
    float alt;
    uint8 pld_hw_id;
    uint8 act_tmr_min;
    uint8 act_tmr_sec;
    uint16 act_tmr_ms;
}tctm_trgt_pt_req_s;

/*********************************************************************************/
/******************* TeleMetry Payload Structure Definitions *********************/
/*********************************************************************************/

/*!
 *  @brief This structure holds the location information
 */
typedef struct _tctm_gnss_loc_info
{
    uint8 status;
    float lat;
    float longit;
    float alt;
}tctm_gnss_loc_info_s;



/**
 *  *   @brief UART Init Structure definition
 *   **/
typedef struct
{
    uint32_t baudrate;
    uint32_t wordlength;
    uint32_t stopbits;
    uint32_t parity;
    uint32_t mode;
    uint32_t hw_flow_ctl;
    uint32_t over_sampling;
    uint32_t onebit_sampling;
}__attribute__((__packed__))tctm_uart_init_s;


/**
 * *  @brief USB Instance Initialization Structure definition
 * */
typedef struct
{
    uint32_t dev_endpoints;
    uint32_t host_channels;
    uint32_t speed;
    uint32_t dma_enable;
    uint32_t ep0_mps;
    uint32_t phy_itface;
    uint32_t sof_enable;
    uint32_t low_power_enable;
    uint32_t lpm_enable;
    uint32_t battery_charging_enable;
    uint32_t vbus_sensing_enable;
    uint32_t use_dedicated_ep1;
    uint32_t use_external_vbus;

}__attribute__((__packed__))tctm_usb_otg_cfg_s;


/**
 *  * @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
 *   * @brief  I2C Configuration Structure definition
 *    *
 *     **/
typedef struct
{
    uint32_t timing;
    uint32_t own_address1;
    uint32_t addressing_mode;
    uint32_t dual_address_mode;
    uint32_t own_address2;
    uint32_t own_address2_masks;
    uint32_t generalcall_mode;
    uint32_t no_stretch_mode;
}__attribute__((__packed__))tctm_i2c_init_s;
/**
 *  *  @brief  CAN init structure definition
 *   **/
typedef struct
{
    uint32_t prescaler;
    uint32_t mode;
    uint32_t syncjumpwidth;
    uint32_t time_seg1;
    uint32_t time_seg2;
    uint8_t  time_triggered_mode;
    uint8_t  autobus_off;
    uint8_t  autowake_up;
    uint8_t  auto_retransmission;
    uint8_t  receive_fifo_locked;
    uint8_t  transmit_fifo_priority;

}__attribute__((__packed__))tctm_can_init_s;

/* 
 * @brief  ETH Init Structure definition
 */
typedef struct
{
    uint32_t  auto_negotiation;
    uint32_t  speed;
    uint32_t  duplex_mode;
    uint16_t  phy_address;
    uint8_t   *mac_addr;
    uint32_t  rx_mode;
    uint32_t  checksum_mode;
    uint32_t  media_interface;

}__attribute__((__packed__))tctm_ethernet_init_s;


/**
 *  *   @brief  SPI Configuration Structure definition
 *   **/
typedef struct
{
    uint32_t mode;
    uint32_t direction;
    uint32_t datasize;
    uint32_t clk_polarity;
    uint32_t clk_phase;
    uint32_t nss;
    uint32_t baudrate_prescaler;
    uint32_t firstbit;
    uint32_t timode;
    uint32_t crc_calculation;
    uint32_t crc_polynomial;
    uint32_t crc_length;
    uint32_t nssp_mode;
}__attribute__((__packed__))tctm_spi_init_s;

typedef struct
{
    uint8_t Hour;
    uint8_t Minute;
    uint8_t Seconds;
    uint8_t Date;
    uint8_t Month;
    uint16_t Year;
    uint8_t rsrvd;
}__attribute__((__packed__))tctm_time_par_s;

typedef struct _obc_vm_pwr_off_info
{
    uint16 vm_id;
    uint8 shut_tmr_min;
    uint8 shut_tmr_sec;
    uint16 shut_tmr_ms;
    uint8 shut_purpose;
}__attribute__((__packed__))obc_vm_pwr_off_info_s;

typedef struct tc_defferd_strg_t
{
    uint32 wrt_offset;
    uint16 data_len;
}__attribute__((__packed__))s_tc_defferd_strg;

/*** TX_Beacon_DATA_STRUCT ***/
typedef struct
{
	uint8 bcon_msg[18];
	uint32 utc_tim;
	uint8 utc_gps_tim_sts; //UTC Time from GPS/RTC	Uint8	1
	float latitude;// Latitude// 	Float	4
	float longitude; //Longitude//	Float	4
	float altitude; ////Antenna altitude above/below mean sealevel in meters
	double x_pos;
	double y_pos;
	double z_pos;
	double x_vel;
	double y_vel;
	double z_vel;
}__attribute__((__packed__)) s_sdr_bcon_utc_gps;

typedef struct
{
    uint8_t fsm_state;      /* FSM current state */
    uint8_t num_resets;    /* No of OBC resets */
    uint16_t io_err;           /* IO errors */
    uint8_t sys_err;          /* System errors */
}__attribute__((__packed__)) s_sdr_obc_mh_pld;

typedef struct
{
    uint8_t obc_volt_sensor;     /* OBC Voltage sensor value */
    uint8_t ps_volt_sensor;       /* PS sensor value */
    uint8_t temp_obc;              /* OBC temperature */
    uint8_t temp_ps;               /* PS temperature */
    uint8_t temp_es;               /* ES temperature */
    uint8_t temp_gps;             /* GPS temperature */
}__attribute__((__packed__)) s_sdr_sen_mh_pld;

typedef struct
{
        uint8_t totl_btry_volt;       /*Total battery voltage*/
        uint8_t totl_panel_pwr;    /*Total panel power*/
        uint16_t chnl_sts;            /*Channel status*/
        uint8_t overcrnt_err_flg_byte1; /*Over current error flag byte1*/
        uint16_t overcrnt_err_flg_byte2; /*Over current error flag byte2*/
}__attribute__((__packed__)) s_sdr_eps_mh_pld;

typedef struct
{
    uint8_t fsm_state_mode;          /*!< ADCS Current state and ADCS Current mode */
    uint16_t sns_actr_pwr_sts; /*!< Sensor, actuators Power status*/
    uint8_t actrs_run_sts;      /*!< ADCS Actuator running status*/
}__attribute__((__packed__)) s_sdr_adcs_mh_pld;

typedef struct
{
    uint8_t sdr_fsm_st:4;      /*SDR fsm state*/
    uint8_t rssi0:2;               /*Receive signal strength indicator 0*/
    uint8_t rssi1:2;               /*Receive signal strength indicator 1*/
    uint32_t rx_err_cnt;        /*RX error count*/
    uint32_t tx_frm_cnt;       /*TX frame count*/
    uint32_t rx_freq;            /*RX frequency*/
    uint16_t symb_freq:8;    /*Symbol frequency*/
    uint16_t mod:2;             /*Modulation type*/
    uint16_t roll_off:2;         /*Roll off*/
    uint16_t rand_enb:2;      /*Randamoization enable*/
    uint16_t cc_enb:1;         /*Convolution coding enable*/
    uint16_t rs_enb:1;         /*Reed solomon enable */
}__attribute__((__packed__)) s_sdr_sband_mh_info;

typedef struct
{
    uint8_t sdr_fsm_st:4;      /*SDR fsm state*/
    uint8_t rssi0:2;               /*Receive signal strength indicator 0*/
    uint8_t rssi1:2;               /*Receive signal strength indicator 1*/
    uint32_t rx_err_cnt;        /*RX error count*/
    uint32_t tx_frm_cnt;        /*TX frame count*/
    uint32_t rx_freq;             /*RX frequency*/
    uint16_t symb_freq:4;     /*Symbol frequency*/
    uint16_t mod:1;              /*Modulation type*/
    uint16_t roll_off:1;          /*Roll off*/
    uint16_t crc_enb:2;          /*Cyclic redundancy check enable*/
    uint16_t dc_filter_enb:2;   /*DC filter enable*/
    uint16_t cc_enb:2;           /*Convolution coding enable*/
    uint16_t rand_enb:2;        /*Randamoization enable*/
    uint16_t manchester_coding_en:2; /**Manchester coding enable*/
}__attribute__((__packed__)) s_sdr_uhf_mh_info;

typedef struct
{
        s_sdr_bcon_utc_gps bcon_utc_gps;
        s_sdr_obc_mh_pld obc_mh;
        s_sdr_sen_mh_pld sen_mh;
        s_sdr_eps_mh_pld eps_mh;
        s_sdr_adcs_mh_pld adcs_mh;
        s_sdr_sband_mh_info sdr_sband_mh;
        s_sdr_uhf_mh_info sdr_uhf_mh;
}__attribute__((__packed__)) s_sdr_beacon_pld;

typedef struct
{
    uint32_t clock_status;
    double offset;
    double offset_std;
    double utc_offset;
    uint32_t utc_year;
    uint8_t utc_month;
    uint8_t utc_day;
    uint8_t utc_hour;
    uint8_t utc_min;
    uint32_t utc_ms;
    uint32_t utc_status;

}__attribute__((__packed__)) s_oem7_time;

/**
 * @brief Structure contains the received telecommand informations
 */
typedef struct
{
    uint32_t tc_rcvd_time;          /*!< TC received time */
    uint16_t tc_id;                 /*!< TC Id */
    uint16_t dst_id;                /*!< Destination Id */
}__attribute__((__packed__))s_tc_dbg_info;

/**
 * @brief Structure contains the received telemetry informations
 */
typedef struct
{
    uint32_t tm_sent_time;          /*!< TM Sent/generated time */
    uint16_t tm_id;                 /*!< TM Id */
    uint16_t src_id;                /*!< Source Id */
}__attribute__((__packed__))s_tm_dbg_info;

/**
 * @brief Structure contains the Telecommand and telemetry debug informations
 */
typedef struct
{
    uint8_t status;
    uint8_t dbg_info_cnt;
    s_tc_dbg_info tc_dbg_info[MAX_TCTM_DBG_INFO];
    s_tm_dbg_info tm_dbg_info[MAX_TCTM_DBG_INFO];
}__attribute__((__packed__))s_tctm_dbg_info;

typedef struct
{
    uint32_t time_stamp;        /*!< Memory allocated time */
    /* [31:31] - Memory Type (1 - Internal Memory/ 0 - External memory), [30:0] - Length */
    uint32_t alct_mem_len;      /*!< Allocated memory length in bytes */
    uint8_t file_name_len;      /*!< File name length */
    char* file_name;            /*!< File name */
    uint16_t line_number;       /*!< Line number */
}__attribute__((__packed__))s_mem_leak_info;

/**
 * @brief This API creates socket interface to send Telecommand data
 *
 * @param[in] params    : Unused parameter
 *
 * @return Result of API execution status
 * @retval 0 -> Success / other values -> Error.
 */
void *mfcc_usr_input_thread(void *params);

/**
 * @brief This API parses the received Telemetry information
 *
 * @param[in] tm_data   : contains the TM binary data stream
 *
 * @return Result of API execution status
 * @retval 0 -> Success / other values -> Error.
 */
int mfcc_tm_parser(uint8 *tm_stream_data,uint32_t recv_byte_size);

/**
 * @brief This API validates the sequence number of received TM data
 *
 * @param[in] actual_seq_no    : Sequence number of received TM data frame
 *
 * @return Result of API execution status
 * @retval 0 -> Success / other values -> Error.
 */
void mfcc_validate_seq_num(uint16 actual_seq_no);
void *mfcc_tm_listener_thread (void * params);
void *mfcc_ft_tc_sender_thread (void * params);

uint32_t file_checksum(char file_name[], uint32_t length);
long int file_findSize(char file_name[]);

int8 tc_trgt_point_req_enc(uint8* data, tctm_trgt_pt_req_s *tpr);
int8 tc_spi_intf_param_enc(uint8* data, tctm_spi_init_s *spii);
int8 tc_ethernet_init_param_enc(uint8* data, tctm_ethernet_init_s *eth);
int8 tc_can_init_param_enc(uint8* data, tctm_can_init_s *cis);
int8 tc_i2c_init_param_enc(uint8* data, tctm_i2c_init_s *i2ci);
int8 tc_usb_init_param_enc(uint8* data, tctm_usb_otg_cfg_s *usbo);
int8 tc_uart_init_param_enc(uint8* data, tctm_uart_init_s *uarti);
//int8 tm_gnss_loc_info_dec(uint8* data, tctm_gnss_loc_info_s *gli);
int8 tm_spi_intf_param_dec(uint8* data, tctm_spi_init_s *spii);
int8 tm_ethernet_init_param_dec(uint8* data, tctm_ethernet_init_s *eth);
int8 tm_can_init_param_dec(uint8* data, tctm_can_init_s *cis);
int8 tm_i2c_init_param_dec(uint8* data, tctm_i2c_init_s *i2ci);
int8 tm_usb_init_param_dec(uint8* data, tctm_usb_otg_cfg_s *usbo);
int8 tm_uart_init_param_dec(uint8* data, tctm_uart_init_s *uarti);
void mfcc_tc_send(uint32 tc_id, uint16 da_id);

void mfcc_tc_send(uint32 tc_id, uint16 da_id);
#if 0
int8 tc_set_conv_brd_par_enc(uint8_t* data,eps_set_conv_brd_s *eps_board);
int8 tc_set_batt_brd_par_enc(uint8_t* data,eps_set_btry_brd_s *eps_batt);
int8 tc_out_chnl_enb_enc(uint8_t* data,eps_set_out_chnl_enb_s *eps_chnl);
int8 tc_out_chnl_cur_lmt_enc(uint8_t* data,eps_set_out_chnl_crnt_lmt_s *eps_cur);
int8 tc_set_eps_mode_cfg_enc(uint8_t* data,eps_set_mode_s *eps_mode);
#endif
void eps_status_func(int8_t eps_data);
#if 0
int8 tc_get_var_addr_enc(uint8_t* data, tctm_eps_set_var_addr_s *eps);

int8 tm_get_conv_brd_read_dec(uint8* data, eps_get_conv_brd_rd_s *eps_rd_board);
int8 tm_get_conv_brd_set_dec(uint8* data,eps_get_conv_brd_stng_s *eps_stng_board);
int8 tm_get_batt_brd_read_dec(uint8* data, eps_get_btry_brd_rd_s *eps_rd_batt);
int8 tm_get_batt_brd_set_dec(uint8* data,eps_get_btry_brd_stng_s *eps_stng_batt);
int8 tm_get_out_chnl_par_dec(uint8* data, eps_get_out_chnl_sts_s *eps_get_chnl_sts);
int8 tm_get_cur_chnl_rd_dec(uint8* data, eps_get_chnl_cur_rd_s *eps_cur_chnl_rd);
int8 tm_get_cur_chnl_stng_dec(uint8* data, eps_get_chnl_cur_stng_s *eps_cur_chnl_stng);
int8 tm_get_eps_mode_dec(uint8* data, eps_get_stng_mode_resp_s *eps_mode);
int8 tm_get_eps_var_info_dec(uint8* data, tctm_eps_get_var_val_s *eps_var_info);
int8 tm_get_eps_alert_info_dec(uint8* data,eps_alert_flag_resp_s *eps_alert_info);
#endif
int8 tm_tty_data_dec(uint8* data, uint8* tm_tty_data, uint32 data_size);
int8 tc_tty_data_enc(uint8* data, uint8* tc_tty_data, uint32 data_size);
int8 tc_schedule_cfg_lut_enc(uint8 *data, uint16 num_events);
int8 tc_schedule_deploy_enc(uint8 *data, uint8 num_days);

int8 tc_set_cur_time_enc(uint8* data, tctm_time_par_s *time);
int8 get_crnt_time_date(tctm_time_par_s *get_time_date);
int8 tm_obc_soft_reset_dec(uint8* data, uint32* rst_sts);
//int8 tm_get_eps_fw_update(uint8* data,eps_get_fw_s *eps_fw);

uint8_t obc_mem_debug_tc_enc();
int8 obc_mem_debug_tc_encode(uint8  mem_type);
//int8 obc_mem_debug_tc_encode(uint8_t mem_type);
int8 obc_mem_debug_tm_dec(uint32 *data);

//ADCS
void parse_adcs_seq_cmd(void);
void parse_adcs_tc_tm_seq_cmd(void);
void tm_adcs_dec(uint8* data, uint16 size, uint16 tm_id);

void log_notificataion_api_dwld(ft_notification_info *ft_sts);
//void eps_get_dev_hw_sts_print(uint8 val);
void *mfcc_tm_listener_thread(void *params);
int32_t csp_send_tm(uint8_t* tm_data, uint16_t len);
void sat_dev_print();
void eps_pwr_tmr_val(eps_dev_tmr_c *dev_id);
uint8 handle_tc_deferred_storage(void);
int32_t csp_recv_tc(void);
int8_t get_sub_mod_task_id(uint8 sub_mod);
void sch_tc_update_offset();

//Health Metric TM processing APIs
void tm_process_health_data(uint8_t *data_ptr, uint32_t len);
void hm_fw_eps_tm(uint8_t queue_id, uint16_t num_of_instance, uint8_t* data);
//void hm_fw_adcs_tm(uint8_t queue_id, uint8_t num_of_instance, uint8_t* data);
void hm_fw_comms_sband_tm(uint8_t queue_id, uint16_t num_of_instance, uint8_t* data);
void hm_fw_comms_uhf_tm(uint8_t queue_id, uint16_t num_of_instance, uint8_t* data);
void hm_fw_test_case_tm(uint8_t queue_id, uint16_t num_of_instance, uint8_t* data);
void hm_fw_sensors_tm(uint8_t queue_id, uint16_t num_of_instance, uint8_t* data);
void hm_fw_obc_tm(uint8_t queue_id, uint16_t num_of_instance, uint8_t* data);
void hm_fw_err_hdlr_tm(uint8_t queue_id, uint16_t num_of_instance, uint8_t* data);


void mfcc_adcs_tc_send(uint32 tc_id, uint8 *adcs_data, uint16 tc_len);
#endif
