#include "eps_pgood.h"
#include "exo_gpio.h"
#include "exo_osal.h"
#include "exo_common.h"
#include "eps_ctrlr.h"

extern volatile uint8_t kernel_init_status;

void ps_dvddl_pgd_isr(void * args)
{
	os_itc_msg_handle_t pgd_ipc;
	uint8_t pin_ste = 0; 
#ifdef JANUS2
	pin_ste = io_hal_gpio_readpin(PS_DVDDL_PG);
#endif
        if(kernel_init_status!=0)
	{
		pgd_ipc.pld_info=PGOOD_STATE;
		pgd_ipc.Msg_id=(PS_PGD_DVDDL & 0x0F) | (pin_ste << 8);
		os_itc_msg_send(&pgd_ipc,EPS_TASK,0);
	}
}
void ps_dvddio_pgd_isr(void * args)
{
	os_itc_msg_handle_t pgd_ipc;
	uint8_t pin_ste = 0; 
#ifdef JANUS2
	pin_ste = io_hal_gpio_readpin(PS_DVDDIO_PG);
#endif
	if(kernel_init_status!=0)
	{
		pgd_ipc.pld_info=PGOOD_STATE;
		pgd_ipc.Msg_id=(PS_PGD_DVDDIO & 0x0F) | (pin_ste << 8);
		os_itc_msg_send(&pgd_ipc,EPS_TASK,0);
	}
}
void obc_dvddio_pgd_isr(void * args)
{
	os_itc_msg_handle_t pgd_ipc;
	uint8_t pin_ste = 0; 
#ifdef JANUS2
	pin_ste = io_hal_gpio_readpin(OBC_DVDDIO_PG);
#endif
	if(kernel_init_status!=0)
	{
		pgd_ipc.pld_info=PGOOD_STATE;
		pgd_ipc.Msg_id=(OBC_PGD_DVDDIO & 0x0F) | (pin_ste << 8);
		os_itc_msg_send(&pgd_ipc,EPS_TASK,0);
	}
}
void obc_dvddl_pgd_isr(void * args)
{
	os_itc_msg_handle_t pgd_ipc;
	uint8_t pin_ste = 0; 
#ifdef JANUS2
	pin_ste = io_hal_gpio_readpin(OBC_DVDDL_PG);
#endif
	if(kernel_init_status!=0)
	{
		pgd_ipc.pld_info=PGOOD_STATE;
		pgd_ipc.Msg_id=(OBC_PGD_DVDDL & 0x0F) | (pin_ste << 8);
		os_itc_msg_send(&pgd_ipc,EPS_TASK,0);
	}
}
void edge_1p8v_pgd_isr(void * args)
{
	os_itc_msg_handle_t pgd_ipc;
	uint8_t pin_ste = 0; 
#ifdef JANUS2
	pin_ste = io_hal_gpio_readpin(EDGE_PGOOD_1P8V_EDGE);
#endif
	if(kernel_init_status!=0)
	{
		pgd_ipc.pld_info=PGOOD_STATE;
		pgd_ipc.Msg_id=(EDGE_PGD_1P8V & 0x0F) | (pin_ste << 8);
		os_itc_msg_send(&pgd_ipc,EPS_TASK,0);
	}
}
void edge_3p3v_pgd_isr(void * args)
{
	os_itc_msg_handle_t pgd_ipc;
	uint8_t pin_ste = 0; 
#ifdef JANUS2
	pin_ste = io_hal_gpio_readpin(EDGE_PGOOD_3P3V_EDGE);
#endif
	if(kernel_init_status!=0)
	{
		pgd_ipc.pld_info=PGOOD_STATE;
		pgd_ipc.Msg_id=(EDGE_PGD_3P3V & 0x0F) | (pin_ste << 8);
		os_itc_msg_send(&pgd_ipc,EPS_TASK,0);
	}
}
void gps_hub_pgd_isr(void * args)
{
	os_itc_msg_handle_t pgd_ipc;
	uint8_t pin_ste = 0; 
#ifdef JANUS2
	pin_ste = io_hal_gpio_readpin(GPS_HUB_PGOOD);
#endif
	if(kernel_init_status!=0)
	if(kernel_init_status!=0)
	{
		pgd_ipc.pld_info=PGOOD_STATE;
		pgd_ipc.Msg_id=(GPS_PGD_HUB & 0x0F) | (pin_ste << 8);
		os_itc_msg_send(&pgd_ipc,EPS_TASK,0);
	}
}
void gps_pgd_isr(void * args)
{
	os_itc_msg_handle_t pgd_ipc;
	uint8_t pin_ste = 0; 
#ifdef JANUS2
	pin_ste = io_hal_gpio_readpin(GPS_PGOOD);
#endif
	if(kernel_init_status!=0)
	{
		pgd_ipc.pld_info=PGOOD_STATE;
		pgd_ipc.Msg_id=(GPS_PGD & 0x0F) | (pin_ste << 8);
		os_itc_msg_send(&pgd_ipc,EPS_TASK,0);
	}
}
void gps_core_pgd_isr(void * args)
{
	os_itc_msg_handle_t pgd_ipc;
	uint8_t pin_ste = 0; 
#ifdef JANUS2
	pin_ste = io_hal_gpio_readpin(GPS_CORE_PGOOD);
#endif
	if(kernel_init_status!=0)
	{
		pgd_ipc.pld_info=PGOOD_STATE;
		pgd_ipc.Msg_id=(GPS_PGD_CORE & 0x0F) | (pin_ste << 8);
		os_itc_msg_send(&pgd_ipc,EPS_TASK,0);
	}
}
