#include "exo_hal_io_al_intr.h"
#include "exo_osal.h"
#include "exo_common.h"
#include "exo_io_al_can_common.h"
#include "exo_io_al_uart_common.h"
#include "exo_io_al_spi_common.h"
#include "exo_io_al_i2c_common.h"
#include "exo_ahw_al_gpio_exp_common.h"


void spi_intr_hdl(uint8 spi_inst_id, uint8_t cb_id)
{
	 ioal_spi_hdle *ioal_hspi;
	 ioal_hspi = get_ioal_inst_hdle(spi_inst_id);
	 switch(cb_id)
	 {
	 case SPI_TX_CPLT_CB:
		 ioal_hspi->spi_tx_cplt_cb(ioal_hspi);
		 break;
	 case SPI_RX_CPLT_CB:
		 ioal_hspi->spi_rx_cplt_cb(ioal_hspi);
		 break;
	 case SPI_TX_RX_CPLT_CB:
		 ioal_hspi->spi_tx_rx_cplt_cb(ioal_hspi);
		 break;
	 case SPI_ABORT_CPLT_CB:
		 ioal_hspi->spi_abort_cplt_cb(ioal_hspi);
		 break;
	 case SPI_ERROR_CB:
		 ioal_hspi->spi_error_cb(ioal_hspi);
		 break;
	 default:
		 break;
	 }
}

void uart_intr_hdl(uint8 uart_inst_id, uint8_t cb_id)
{
	 ioal_uart_hdle *ioal_huart;
	 ioal_huart = get_ioal_inst_hdle(uart_inst_id);
	 switch(cb_id)
	 {
	 case UART_TX_CPLT_CB:
		 ioal_huart->tx_cplt_cb(ioal_huart);
		 break;
	 case UART_RX_CPLT_CB:
		 ioal_huart->rx_cplt_cb(ioal_huart);
		 break;
	 case UART_ABORT_CPLT_CB:
		 ioal_huart->abort_cplt_cb(ioal_huart);
		 break;
	 case UART_TX_ABORT_CPLT_CB:
		 ioal_huart->abort_tx_cplt_cb(ioal_huart);
		 break;
	 case UART_RX_ABORT_CPLT_CB:
		 ioal_huart->abort_rx_cplt_cb(ioal_huart);
		 break;
	 case UART_ERROR_CB:
		 ioal_huart->error_cb(ioal_huart);
		 break;
	 default:
		 break;
	 }
}

void i2c_intr_hdl(uint8 i2c_inst_id, uint8_t cb_id)
{
	 ioal_i2c_hdle *ioal_hi2c;
	ioal_hi2c = get_ioal_inst_hdle(i2c_inst_id);
	 switch(cb_id)
	 {
	 case I2C_MST_TX_CPLT_CB:
		 ioal_hi2c->i2c_mst_tx_cplt_cb(ioal_hi2c);
		 break;
	 case I2C_MST_RX_CPLT_CB:
		 ioal_hi2c->i2c_mst_rx_cplt_cb(ioal_hi2c);
		 break;
	 case I2C_ABORT_CPLT_CB:
		 ioal_hi2c->i2c_abort_cplt_cb(ioal_hi2c);
		 break;
	 case I2C_LISTEN_CPLT_CB:
		 ioal_hi2c->i2c_listen_cplt_cb(ioal_hi2c);
		 break;
	 case I2C_ERROR_CB:
		 ioal_hi2c->i2c_mst_tx_cplt_cb(ioal_hi2c);
		 break;
	 default:
		 break;
	 }
}


void exo_io_ah_intr_hdl(void* args)
{
	os_itc_msg_handle_t hal_intr_hdlr_ipc;
	while(1)
	{
		 os_itc_msg_rcv(HAL_INTR_HDLR,&hal_intr_hdlr_ipc,os_wait_forever);
		 switch(hal_intr_hdlr_ipc.pld_info)
		 {
		 case IOAL_INST_I2C1:
		 case IOAL_INST_I2C2:
		 case IOAL_INST_I2C3:
		 case IOAL_INST_I2C4:
			 i2c_intr_hdl(hal_intr_hdlr_ipc.pld_info,hal_intr_hdlr_ipc.pld.pld_data);
			 break;
		 case IOAL_INST_SPI1:
		 case IOAL_INST_SPI2:
			 spi_intr_hdl(hal_intr_hdlr_ipc.pld_info,hal_intr_hdlr_ipc.pld.pld_data);
			 break;
		 case IOAL_INST_UART1:
		 case IOAL_INST_UART2:
		 case IOAL_INST_UART3:
		 case IOAL_INST_UART4:
		 case IOAL_INST_UART5:
		 case IOAL_INST_UART6:
			 uart_intr_hdl(hal_intr_hdlr_ipc.pld_info,hal_intr_hdlr_ipc.pld.pld_data);
			 break;
		 case IOAL_INST_CAN1:
		 case IOAL_INST_CAN2:
		 case IOAL_INST_CAN3:
			 break;
		 case IOAL_INST_GPIO:
			 ahw_al_gpio_exp_isr_hdlr(hal_intr_hdlr_ipc.pld.pld_data);
			 break;
			 default:
				 break;
		 }

	}

}

hal_ret_sts io_ahw_hal_intr_init()
{
	hal_ret_sts sts;
	if(os_thread_create(HAL_INTR_HDLR,T_HAL_INTR_SIZE, P_HAL_INTR_HDLR, "io_ahw_hal_intr_hdlr",exo_io_ah_intr_hdl , NULL, NULL, NULL)==os_success)
	{
		sts=HAL_SCS;
	}
	else
	{
		sts=HAL_IO_INIT_ERR;
	}
	return sts;
}
