/**
 * @file sband_xlink_rfe_ctr.h
 *
 * @brief This file has the control blocks used for X-Band configuration
 *
 */

#ifndef _SBAND_RFE_CTR_H_
#define _SBAND_RFE_CTR_H_

#include "exo_types.h"

#define RFE_RX_MIX_0		0
#define RFE_RX_MIX_1		5900000
#define RFE_TX_MIX_0		5900000
#define RFE_TX_MIX_1		5900000
#define RFE_RX_FREQ_0		2020000
#define RFE_RX_FREQ_1		7160000
#define RFE_TX_FREQ_0		8400000
#define RFE_TX_FREQ_1		8400000

// RFE_HW_PIN_STRUCT
#define RFE_HW_PIN_MASK		0x000001FF

//uint32 TxLevel_0      	:11;	//!< Tx Level for XmtChannel 0 (0...2047)
#define	TX_LEV_DEFAULT		880

#define RX_GAIN_MAX_DEFAULT	76

/*********************************************************/
/* !!! NOTE !!! for future featurekey extensons,         */
/* keep in mind, reserve bits are pre-initialized with 1 */
/*********************************************************/
typedef struct
{
    /* uint32 WordBoundary [0] */
    uint32 Crc16			:16;		//!< Crc16 checksum							--> default 0x0815
    //uint32 TxSampFact	        	:10;		//!< Factor for the TxSymbol (Sample) Frequency with 256.000Hz Base (3...218 -> 768.000...55.808.000Hz)
    uint32 Reserve_0	        	:10;		//!< Reserve Bits, previously TxSampFact
    uint32 MoreXmtMod	        	: 1;		//!< the use of Xmt Modulations 8-, 16-, 32- and 64PSK is allowed
    uint32 XmtOffsetMod	        	: 1;		//!< the use of Xmt Offset Modulation is allowed (only QPSK)
    uint32 RsMode			: 4;		//!< the use of this CCSDS reed Solomon Encoder is allowed; one of the 12 different Types or ALL(0xF) selectable

    /* uint32 WordBoundary [1] */
    uint32 XmtCh0_En	        	: 1;		//!< the use of Xmt channel 0 is allowed
    uint32 XmtCh1_En	        	: 1;		//!< the use of Xmt channel 1 is allowed
    uint32 RcvCh0_En	        	: 1;		//!< the use of Rcv channel 0 is allowed
    uint32 RcvCh1_En	        	: 1;		//!< the use of Rcv channel 1 is allowed
    uint32 RcvCh0_GainMax		: 1;		//!< the use of Rcv channel 0 RxGainMax is selectable
    uint32 RcvCh1_GainMax		: 1;		//!< the use of Rcv channel 1 RxGainMax is selectable
    uint32 DisableXmtSymbFreqChange     : 1;            //!< the use of a custom XmtSymbFreq is NOT allowed [deprecated]
    uint32 DisableRcvSymbFreqChange     : 1;            //!< the use of a custom RcvSymbFreq is NOT allowed [deprecated]
    uint32 DisableXmtUpSampling         : 1;            //!< Xmt UpSampling is NOT possible (don't use MODE_SW_UPSAMPLING)
    uint32 Reserve_1		        :23;		//!< Reserve Bits uint32[1]

    /* uint32 WordBoundary [2] */
    uint32	XmtSymbFreq		:16;		//!< Transmit Symbol Frequency in kHz (1...56.000)
    uint32 RcvSymbFreq	        	:16;		//!< Receive  Symbol Frequency in kHz (1...56.000)

    /* uint32 WordBoundary [3] */
    uint32 Reserve_3		        :32;		//!< Reserve Bits uint32[3]
}FEATURE_SELECT_STRUCT;			        	//!< 16Byte (128Bit) structure for Feature Selection

typedef struct
{
    uint32	RfeRx0On		: 1;		//!< RfeRx0On	==> RX-Mixer and ZF for X-Band RX
    uint32	RfeTx0On		: 1;		//!< RfeTx0On	==> TX-Mixer, Preamplifier S- and X-Band Tx0-Path
    uint32	RfePa0On		: 1;		//!< RfePa0On	==> Power Amplifier Tx0-Path
    uint32	RfeRxTx0		: 1;		//!< RfeRxTx0	==> used for PLL and VCO power on/off
    uint32	RfeRx1On		: 1;		//!< RfeRx1On	==> X-Band-LNA RX, 2x+J26S-BAND-LNA. (all)
    uint32	RfeTx1On		: 1;		//!< RfeTx1On	==> TX-Mixer, Preamplifier S- and X-Band Tx1-Path
    uint32	RfePa1On		: 1;		//!< RfePa1On	==> Power Amplifier Tx1-Path
    uint32	RfeRxTx1		: 1;		//!< RfeRxTx1	==> set to '1'
    uint32	RfeOutEn		: 1;		//!< RfeGPio2	==> Output RF_Out_EN Pin LO
    uint32	RfeGpio0		: 1;		//!< RfeGPio0	==> note used
    uint32	RfeLoopDet		: 1;		//!< RfeGPio1	==> Input Loop Detect Pin
    uint32	RfeLoMux		: 1;		//!< RfeGPio3	==> Input LO MUX_Pin
    uint32	RfePowOn		: 1;		//!< RfePowOn	==> not used
    uint32	RfeDA			: 1;		//!< RfeDA	==> Data (3-wire-Bus)
    uint32	RfeCL			: 1;		//!< RfeCL	==> Clock (3-wire-Bus)
    uint32	RfeEnAD5304		: 1;		//!< RfeEn1	==> EN DAC (AD5304) A:XO_VC; B:Bias1; C:Bias2; D:not used
    uint32	RfeEnSynth		: 1;		//!< RfeEn2	==> Syntheser Max2870
    uint32	RfeEn3			: 1;		//!< RfeEn3	==> free for further use
    uint32	RfeEn4			: 1;		//!< RfeEn4	==> free for further use
    uint32	RfeEn5			: 1;		//!< RfeEn5	==> free for further use
    uint32	Rfe7V0En		: 1;		//!< Rfe7V0En	==> 7V0 PowerOn enable
    uint32	RfeRsvuint32		:11;		//!< Rfe reserve to uint32
} RFE_HW_PIN_STRUCT; /* "SAVED_PARAM" but not load */		//!< ==> 1xuint32 Structure for RFE HW-Pins

typedef struct
{
    int32 RxMix[2];				//!< RFE receive DownConversionFrequency (RxMix) Channel 0/1	--> saved / default 0 / 5900000
    int32 TxMix[2];				//!< RFE transmit UpConversionFrequency (TxMix) Channel 0/1	--> saved / default 5900000
    int32 RxFreq[2];				//!< RFE receive Frequency Channel 0/1				--> saved / default 2020000
    int32 TxFreq[2];				//!< RFE transmit Frequency Channel 0/1				--> saved / default 8300000
}RFE_FREQ_STRUCT; /* "SAVED_PARAM" */		//!< ==> 8xuint32 Structure for RFE Frequencies

typedef struct
{
    int32 RxLow[2];				//!< RFE HW-Rcv lowest  possible frequency Channel 0/1		--> saved / default 0
    int32 RxHigh[2];				//!< RFE HW-Rcv highest possible frequency Channel 0/1		--> saved / default 12000000
    int32 TxLow[2];				//!< RFE HW-Xmt lowest  possible frequency Channel 0/1		--> saved / default 0
    int32 TxHigh[2];				//!< RFE HW-Xmt highest possible frequency Channel 0/1		--> saved / default 12000000
}LIM_FREQ_STRUCT;/* "SAVED_PARAM" */		//!< ==> 8xuint32 Structure for RFE HW-Frequencies Limits

typedef struct
{
    uint32 _2Rx2Tx		: 1;		//!< flag for use 2Rx2Tx mode (two channels parallel)
    uint32 TxLevel_0		:11;		//!< Tx Level for XmtChannel 0 (0...2047)
    uint32 TxLevel_1		:11;		//!< Tx Level for XmtChannel 1 (0...2047)
    uint32 RefClk		: 8;		//!< AD9361 reference clock in MHz (10...80MHz; XTAL external clock generator)
    uint32 Reserve		: 1;		//!< Reserve
}AD9361_CTR; /* "SAVED_PARAM" */

typedef struct
{
    uint32 XmtSymbFreq		:16;		//!< Transmit Symbol Frequency in kHz (1...56.000)
    uint32 RcvSymbFreq		:16;		//!< Receive  Symbol Frequency in kHz (1...56.000)
} AD9361_SYMB_FREQ; /* "SAVED_PARAM" */

typedef struct
{
    uint32 Modulat_0		: 3;		//!< Xmt Modulation Channel 0;	-> 0-NoMod; 1-BPSK; 2-QPSK; 3-8PSK; 4-16PSK; 5-32PSK; 6-64PSK; 7-
    uint32 Mode_0		: 4;		//!< Xmt Mode Channel 0;	-> 0-idle; 1-single; 2-dual; 3-RndQPSK;...<br>
    uint32 Fec_0		: 3;		//!< Xmt FEC Channel 0;		-> FEC; 0-1/1; 1-1/2; 2-2/3; 3-3/4; 4-5/6; 5-7/8; 6-; 7-
    uint32 ChEn_0		: 1;		//!< Xmt Enable Channel 0;	-> 0-Disable / 1-Enable
    uint32 PRnd_0		: 1;		//!< Xmt PseudoRanomizer 0;	-> 0-Off / 1-On
    uint32 ASMStart_0		: 1;		//!< Xmt ASM at FrmStart 0;	-> 0-Off / 1-On
    uint32 OffsetMod_0   	: 1;		//!< Xmt Offset Modulation 0;	-> 0-Off / 1-On
    uint32 Ch1_diff_Ch2 	: 1;		//!< if set FPGA output XmtOut_Data <= SigSymb_2 & SigSymb_1; else XmtOut_Data <= SigSymb_1 & SigSymb_1;
    uint32 ChSwitchOn_0 	: 1;		//!< Xmt On/Off Channel 0;	-> 0-Off / 1-On
    // --> 16 Bit
    uint32 Modulat_1		: 3;		//!< Xmt Modulation Channel 1;	-> 0-NoMod; 1-BPSK; 2-QPSK; 3-8PSK; 4-16PSK; 5-32PSK; 6-64PSK; 7-
    uint32 Mode_1		: 4;		//!< Xmt Mode Channel 1;	-> 0-idle; 1-single; 2-dual; 3-RndQPSK;...<br>
    uint32 Fec_1		: 3;		//!< Xmt FEC Channel 1;		-> FEC; 0-1/1; 1-1/2; 2-2/3; 3-3/4; 4-5/6; 5-7/8; 6-; 7-
    uint32 ChEn_1		: 1;		//!< Xmt Enable Channel 0;	-> 0-Disable / 1-Enable
    uint32 PRnd_1		: 1;		//!< Xmt PseudoRanomizer 1;	-> 0-Off / 1-On
    uint32 ASMStart_1		: 1;		//!< Xmt ASM at FrmStart 1;	-> 0-Off / 1-On
    uint32 OffsetMod_1	: 1;		//!< Xmt Offset Modulation 1;	-> 0-Off / 1-On
    uint32 ChSwitchOn_1	: 1;		//!< Xmt On/Off Channel 1;	-> 0-Off / 1-On

    uint32 OffsetModNormaly	: 1;		//!< Xmt 1-Offset Modulation normaly;
}XMT_CTR0;/* "SAVED_PARAM" */


typedef struct
{
    uint32 AttTxGain_0	:10;		//!< the Tx Attenuation Channel 0 in 0.1dB (0..89.7)
    uint32 AttTxGain_1	:10;		//!< the Tx Attenuation Channel 1 in 0.1dB (0..89.7)
    uint32 TrFrmSz		:12;		//!< the Transfer Frame Size in Bytes (1..2048; 0-auto) -> without 4 Byte ASM
}XMT_CTR3;/* "SAVED_PARAM" */

typedef struct
{
    int32 PhiOffset16		: 5;		//!< Phase Offset for the outer APSK16 Ring +/-15? in 1? Steps
    uint32 Y16	   	:13;		//!< gamma x 1000 -> relation between r2=1 and r1=r2/y (-> 2,580 = 2580)
    uint32 TxSampFact 	:10;		//!< Factor for the TxSymbol (Sample) Frequency with 256.000Hz Base (3...218 -> 768.000...55.808.000Hz)
    uint32 RsMode	   	: 4;		//!< use CCSDS reed Solomon Encoder 0- Off;
    //!< 1-[255,223]I1; 2-[255,223]I2; 3-[255,223]I3; 4-[255,223]I4; 5-[255,223]I5; 6-[255,223]I8
    //!< 8-[255,239]I1; 9-[255,239]I2; A-[255,239]I3; B-[255,229]I4; C-[255,239]I5; D-[255,239]I8
}XMT_CTR4;/* "SAVED_PARAM" */

typedef struct
{
    uint32 RcvMode		: 4;		//!< 0x0-Transparent; 0x1-CalcPowPhi; 0x2-...
    uint32 RcvChannel		: 2;		//!< 00-> RCV_OFF; 01-> RCV_CH0; 10-> RCV_CH1; 11-> RCV_BOTH
    uint32 ChSwitchOn_0 	: 1;		//!< Rcv On/Off Channel 0;		-> 0-Off / 1-On
    uint32 ChSwitchOn_1 	: 1;		//!< Rcv On/Off Channel 1;		-> 0-Off / 1-On
    uint32 DropSample		:12;		//!< Drop Samples (0...3499)
    uint32 dT_minus             : 1;            //!< correct dt with 1/32 Symbole during decimation
    uint32 dT_plus              : 1;            //!< correct dt with 1/32 Symbole during decimation
    uint32 RxState              :3;
    uint32 ModType              :1;
    uint32 Reserve              :6;
    //uint32 DropSample 	:10;		//!< Drop Samples (0...875)
    //uint32 ExtraDropSample	: 2;		//!< extra Drop Samples (0/1/2/3)x4
    //uint32 SampPerSymb	: 2;		//!< Samples per Symbol 1->4; 2->8; 0/3->16;
    //uint32 CheckSymb  	: 2;		//!< Number of Symbols for calc dPhi 0->32; 1->64; 2->128; 3->256
    //uint32 Reserve		: 8;
}RCV_CTR0;/* "SAVED_PARAM" */

typedef struct
{
    uint32 RxGainMax		: 8;		//!< Rcv max RxGain Value		-> 0..76 (offset in RxGainCtr Table)
    uint32 ChEn	        	: 1;		//!< Rcv Enable Channel 0;		-> 0-Disable / 1-Enable
    uint32 Modulat		: 3;		//!< Rcv Modulation			-> 0-NoMod; 1-BPSK; 2-QPSK; 3-8PSK; 4-16PSK; 5-32PSK; 6-64PSK; 7-
    uint32 MsbFirst		: 1;		//!< Rcv Bit Direction			-> 0-LsbFirst; 1-MsbFirst
    uint32 Fec		: 3;		//!< Rcv FEC				-> FEC; 0-1/1; 1-1/2; 2-2/3; 3-3/4; 4-5/6; 5-7/8; 6-; 7-
    uint32 PRnd		: 1;		//!< Rcv PseudoRanomizer		-> 0-Off / 1-On
    uint32 BchDec		: 1;		//!< Rcv BCH Decoder			-> 0-Off / 1-On
    uint32 AccBchErr		: 1;		//!< Rcv accept BCH Error		-> 0-Off / 1-On
    uint32 BchCountMode	: 1;		//!< Rcv bch count mode			-> 0-for ever / 1-rx sync phase only
    uint32 PwrOff		: 6;		//!< PowerOff				-> 0..63 dB (power threshold for detect RF-Signal-Power below the calibrated limitation)
    int32 RcvCalib		: 6;		//!< Rcv Calibration Offset		-> -31..+31 dB; for 12 different FrequencyBands a 500MHz
}RCV_CTR;/* "SAVED_PARAM" */

typedef struct
{
    int32 AD9361		: 8;		//!< Temperature in ?C of the AD9361 Chip
    int32 EthPhy		: 8;		//!< Temperature in ?C of the Ethernet PHY Chip
    int32 Zynq		: 8;		//!< Temperature in ?C of the ZYNQ Chip
    int32 Rest		: 8;		//!< Rest
} TEMPERATURE_STRUCT;				//!< Temperature of three different HW chips

typedef struct
{
    uint32 On			: 1;		//!< Flag if Rcv Channel x HW is active (ON)
    uint32 Sync		: 1;		//!< Flag if Rcv Channel x is in SYNC state, if channel active
    uint32 idxGain		: 7;		//!< Rcv Channel x Gain (0..76dB), if channel active
    uint32 SirMin		: 6;		//!< Rcv Channel x Min. SIR (0..63dB), if channel active
    uint32 SirMax		: 6;		//!< Rcv Channel x Max. SIR (0..63dB), if channel active
    int32 DopplerFreq		: 9;		//!< Doppler frequency (+/-200kHz) if Rcv Channel x is in SYNC state
    uint32 Rest0		: 2;		//!< Rest

    uint32 PwrMin		: 6;		//!< Rcv Channel x Min. PWR (0..63dB), if channel active
    uint32 PwrMax		: 6;		//!< Rcv Channel x Max. PWR (0..63dB), if channel active
    uint32 RxState		: 8;		//!< Information about the Status of the RX state machine
    uint32 Rest1		:12;		//!< Rest

    uint32 BchBlockCount;			//!< counts all bch blocks during the SYNC state

    uint32 BchErrCount;			//!< counts the bch blocks with errors during the SYNC state
} RCV_INF_STRUCT;				//!< Informations about the current state of the Rcv Channel

typedef struct
{
    uint32 On			: 1;		//!< Flag if Xmt Channel x HW is active (ON)
    uint32 Modulation		: 4;		//!< Xmt Modulation, 0-NoMod; 1-BPSK; 2-QPSK; 3-8PSK; 4-16PSK; 5-32PSK; 6-64PSK;
    uint32 Fec		: 4;		//!< Xmt FEC, 0-1/1; 1-1/2; 2-2/3; 3-3/4; 4-5/6; 5-7/8;
    uint32 Att		:10;		//!< Xmt attenuation (0.0 - 89.7dB) in steps of 1/10dB
   // uint32 FpgaMode		: 4;		//!< FpgaMode  0-idle; 1-single; 2-dual; 3-RndQPSK;... updated in v1.7.1
    uint32 Rest		: 13;		//!< Rest
} XMT_INF_STRUCT;				//!< Informations about the current state of the Xmt Channel

/* !!! NOTE !!!
 * HOUSE_KEEP_STRUCT have to be U64 aligned! (because of double datatypes)
 */
typedef struct
{ 
    /*----------------------- U64 boundary [0] -------------------------*/
    double Volt[6];								//!< 6 different CPU Voltages: VCCINT, VCCAUX, VCCBRAM, VCCPINT, VCCPAUX, VCCPDRO
    /*----------------------- U64 boundary [6] -------------------------*/
    TEMPERATURE_STRUCT Temp;							//!< Temperature of three different HW chips
    RCV_INF_STRUCT RcvInfCh[2];							//!< Informations about the current state of the Rcv Channel
    XMT_INF_STRUCT XmtInfCh[2];							//!< Informations about the current state of the Xmt Channel
    uint32 card_run_counter;							//!< OS counter/timer for system ticks
    /*----------------------- U64 boundary [12] -------------------------*/
} HOUSE_KEEP_STRUCT;		//!< XLINK House Keeping Data

#endif /* _SBAND_RFE_CTR_H_ */
